Silicon Photonic 2.5D Multi-Chip Module Transceiver for High-Performance Data Centers

Nathan C. Abrams; Qixiang Cheng; Madeleine Glick; Moises Jezzini; Padraic Morrissey; Peter O'Brien; Keren Bergman

Silicon Photonic 2.5D Multi-Chip Module Transceiver for High-Performance Data Centers

Nathan C. Abrams, Qixiang Cheng, Madeleine Glick, Moises Jezzini, Padraic Morrissey, Peter O'Brien, and Keren Bergman

Journal of Lightwave Technology
Vol. 38,
Issue 13,
pp. 3346-3357
(2020)

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Nathan C. Abrams, Qixiang Cheng, Madeleine Glick, Moises Jezzini, Padraic Morrissey, Peter O'Brien, and Keren Bergman, "Silicon Photonic 2.5D Multi-Chip Module Transceiver for High-Performance Data Centers," J. Lightwave Technol. 38, 3346-3357 (2020)

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Abstract

Widespread adoption of silicon photonics into datacenters requires that the integration of the driving electronics with the photonics be an essential component of transceiver development. In this article, we describe our silicon photonic transceiver design: a 2.5D integrated multi-chip module (MCM) for 4-channel wavelength division multiplexed (WDM) microdisk modulation targeting 10 Gbps per channel. A silicon interposer is used to provide connectivity between the photonic integrated circuit (PIC) and the commercial transimpedance amplifiers (TIAs). Error free modulation is demonstrated at 10 Gbps with −16 dBm received power for the photonic bare die and at 6 Gbps with −15 dBm received power for the first iteration of the MCM transceiver. In this context, we outline the different integration approaches currently being employed to interface between electronics and photonics—monolithic, 2D, 3D, and 2.5D—and discuss their tradeoffs. Notable demonstrations of the various integration architectures are highlighted. Finally, we address the scalability of the architecture and highlight a subsequent prototype employing custom electronic integrated circuits (EICs).

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2019 (5)

“Cisco visual networking index Forecast and trends, 2017-2022,” White Paper, 2019. [Online]. Available: https://www.cisco.com/c/en/us/solutions/collateral/service-provider/visual-networking-index-vni/white-paper-c11-741490.html

J. Sun, R. Kumar, M. Sakib, J. B. Driscoll, H. Jayatilleka, and H. Rong, “A 128 Gb/s PAM4 silicon microring modulator with integrated thermo-optic resonance tuning,” J. Lightw. Technol., vol. 37, no. 1, pp. 110–115, 2019.

Z. Zhou, B. Bai, and L. Liu, “Silicon on-chip PDM and WDM technologies via plasmonics and subwavelength grating,” IEEE J. Sel. Topics Quantum Electron., vol. 25, no. 3, pp. 1–13, 2019.

N. Fahrenkopf, C. McDonough, G. Leake, Z. Su, E. Timurdogan, and D. Coolbaugh, “The AIM photonics MPW: A highly accessible cutting edge technology for rapid prototyping of photonic integrated circuits,” IEEE J. Sel. Topics Quantum Electron., vol. 25, no. 5, pp. 1–6, 2019.

J. Sun, R. Kumar, M. Sakib, J. Driscoll, H. Jayatilleka, and H. Rong, “A 128 Gb/s PAM4 silicon microring modulator with integrated thermo-optic resonance turning,” J. Lightw. Technol., vol. 37, no. 1, pp. 110–115, 2019.

2018 (6)

J. He, “Silicon high-order mode (De)multiplexer on single polarization,” J. Lightw. Technol., vol. 36, no. 24, pp. 5746–5753, 2018.

T. Aoki, “Low-crosstalk simultaneous 16-channel × 25 Gb/s operation of high-density silicon photonics optical transceiver,” J. Lightw. Technol., vol. 36, no. 5, pp. 1262–1267, 2018.

Q. Cheng, M. Bahadori, M. Glick, S. Rumley, and K. Bergman, “Recent advances in optical technologies for data centers: A review,” OSA Optica, vol. 5, no. 11, pp. 1354–1370, 2018.

V. Stojanović, “Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes,” Opt. Express, vol. 26, no. 10, 2018, Art. no. .

A. H. Atabaki, “Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip,” Nature, vol. 556, pp. 349–354, 2018.

M. Garcia-Sciveres and N. Wermes, “A review of advances in pixel detectors for experiments with high rate and radiation,” Rep. Profess Phys., vol. 81, no. 6, 2018.

2017 (5)

A. Samani, “Experimental parametric study of 128 Gb/s PAM-4 transmission system using a multi-electrode silicon photonic Mach–Zehnder modulator,” Opt. Express, vol 25, no. 12, pp. 13252–13262, 2017.

S. Rumley, “Optical interconnects for extreme scale computing systems,” Parallel Comput., vol. 64, pp. 65–80, 2017.

A. Krishnamoorthy, “From chip to cloud: Optical interconnects in engineered systems,” J. Lightw. Technol., vol. 35, no. 15, pp. 3103–3115, 2017.

P. Dong, “Simultaneous wavelength locking of microring modulator array with a single monitoring signal,” Opt. Express, vol. 25, no. 14, pp. 16040–16046, 2017.

S. Straullu, “Demonstration of a partially integrated silicon photonics ONU in a self-coherent reflective FDMA PON,” J. Lightw. Technol., vol. 35, no. 7, pp. 1307–1312, 2017.

2016 (5)

L. Carroll, “Photonic packaging: Transforming silicon photonic integrated circuits into photonic devices,” Appl. Sci., vol. 6, no. 12, p. 426, 2016.

S. Bernabé, “On-board silicon photonics-based transceivers with 1-Tb/s capacity,” IEEE Components, Packag. Manuf. Technol., vol. 6, no. 7, pp. 1018–1025, 2016.

Z. Chen, “Use of polarization freedom beyond polarization division multiplexing to support high-speed and spectral-efficient data transmission,” Light: Sci. Appl., vol. 6, pp. 1–7, 2016.

S. Saeedi, S. Menezo, G. Pares, and A. Emami, “A 25 Gb/s 3D-integrated CMOS/silicon-photonic receiver for low-power high-sensitivity optical communication,” J. Lightw. Technol., vol. 34, no. 12, pp. 2924–2933, 2016.

R. Polster, Y. Thonnart, G. Waltener, J. Gonzalez, and E. Cassan, “Efficiency optimization of silicon photonics links in 65-nm CMOS and 28-nm FDSOI technology nodes,” IEEE Trans. VLSI Syst., vol. 24, no. 12, pp. 3450–3459, 2016.

2015 (6)

G. Denoyer, “Hybrid silicon photonic circuits and transceiver for 50 Gb/s NRZ transmission over single-mode fiber,” J. Lightw. Technol., vol. 33, no. 6, pp. 1247–1254, 2015.

H. Li, “A 25 Gb/s 4.4 V-swing, AC-coupled ring modulator-based WDM transmitter with wavelength stabilzation in 65 nm CMOS,” IEEE J. Solid-State Circuits, vol. 50, no. 12, pp. 3145–3159, 2015.

A. S. G. Andrae and T. Edler, “On global electricity usage of communication technology: Trends to 2030,” Challenges, vol. 6, pp. 117–157, 2015.

E. J. Fluhr, “The 12-core POWER8TM processor with 7.6 Tb/s IO bandwidth, integrated voltage regulation, and resonant clocking,” IEEE J. Solid-State Circuit, vol. 50, no. 1, pp. 10–23, 2015.

C. Sun, “Single-chip microprocessor that communicates directly using light,” Nature, vol. 528, pp. 534–538. 2015.

H. D. Thacker, “An all-solid-state, WDM silicon photonic digital link for chip-to-chip communications,” Opt. Express, vol. 23, no. 10, pp. 12808–12822. 2015.

2014 (4)

K. Padmaraju, D. R. Logan, T. Shiraishi, J. J. Ackert, A. P. Knights, and K. Bergman, “Wavelength locking and thermally stabilizing microring resonators using dithering signals,” J. Lightw. Technol., vol. 32, no. 3, pp. 505–512. 2014.

L. Luo, “WDM-compatible mode-division multiplexing on a silicon chip,” Nature Commun., vol. 5, pp. 1–7, 2014.

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. S. Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nature Commun., vol. 5, pp. 1–11, 2014.

Y. Audzevich, P. M. Watts, A. West, A. Mujumdar, S. W. Moore, and A. W. Moore, “Power optimized transceivers for future switched networks,” IEEE Trans. VLSI Syst., vol. 22, no. 10, pp. 2081–2092, 2014.

2013 (2)

W. A. Zortman, A. L. Lentine, D. C. Trotter, and M. R. Watts, “Bit-error-rate monitoring for active wavelength control of resonant modulators,” IEEE Micro, vol. 33, no. 1, pp. 42–52, 2013.

A. Inmann and D. Hodgins, Implantable Sensor Systems for Medical Applications, Cambridge, U.K.: Woodhead, 2013, p. 119.

2012 (3)

J. F. Buckwalter, X. Zheng, G. Li, K. Raj, and A. Krishnamoorthy, “A Monolithic 25-Gb/s transceiver with photonic ring modulators and Ge detectors in a 130-nm CMOS SOI process,” IEEE J. Solid-State Circuits, vol. 47, no. 6, pp. 1309–1322, 2012.

L. Vivien, “Zero-bias 40 Gbit/s germanium waveguide photodetector on silicon,” Opt. Express, vol. 20, no. 2, pp. 1096–1101, 2012.

F. Y. Liu, “10-Gbps, 5.3-mW optical transmitter and receiver circuits in 40-nm CMOS,” IEEE J. Solid-State Circuits, vol. 47, no. 9, pp. 2049–2067, 2012.

2011 (1)

A. V. Krishnamoorthy, “Progress in low-power switched optical interconnects,” IEEE J. Sel. Topics Quantum Electron., vol. 17, no. 2, pp. 357–376, 2011.

2010 (2)

I. A. Young, “Optical I/O technology for tera-scale computing,” IEEE J. Solid-State Circuits, vol. 45, no. 1, pp. 235–248, 2010.

L. Luo, “High bandwidth on-chip silicon photonic interleaver,” Opt. Express, vol. 18, no. 22, pp. 23080–23087, 2010.

2009 (1)

J. S. LevyA. Gondarenko, M. A. Foster, A. C. Turner-Foster, A. L. Gaeta, and M. Lipson, “CMOS-compatible multiple-wavelength oscillator for on-chip optical interconnects,” Nature Photon., vol. 4, no. 1, pp. 37–40, 2009.

Ackert, J. J.

Andrae, A. S. G.

A. S. G. Andrae and T. Edler, “On global electricity usage of communication technology: Trends to 2030,” Challenges, vol. 6, pp. 117–157, 2015.

Aoki, T.

T. Aoki, “Low-crosstalk simultaneous 16-channel × 25 Gb/s operation of high-density silicon photonics optical transceiver,” J. Lightw. Technol., vol. 36, no. 5, pp. 1262–1267, 2018.

Atabaki, A. H.

A. H. Atabaki, “Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip,” Nature, vol. 556, pp. 349–354, 2018.

Audzevich, Y.

Bahadori, M.

Q. Cheng, M. Bahadori, M. Glick, S. Rumley, and K. Bergman, “Recent advances in optical technologies for data centers: A review,” OSA Optica, vol. 5, no. 11, pp. 1354–1370, 2018.

M. Bahadori, “Energy-performance optimized design of silicon photonic interconnection networks for high-performance computing,” in Proc. Des., Autom., and Test Europe Conf., 2017, pp. 326–331.

Bai, B.

Z. Zhou, B. Bai, and L. Liu, “Silicon on-chip PDM and WDM technologies via plasmonics and subwavelength grating,” IEEE J. Sel. Topics Quantum Electron., vol. 25, no. 3, pp. 1–13, 2019.

Bergman, K.

Q. Cheng, M. Bahadori, M. Glick, S. Rumley, and K. Bergman, “Recent advances in optical technologies for data centers: A review,” OSA Optica, vol. 5, no. 11, pp. 1354–1370, 2018.

Bernabé, S.

S. Bernabé, “On-board silicon photonics-based transceivers with 1-Tb/s capacity,” IEEE Components, Packag. Manuf. Technol., vol. 6, no. 7, pp. 1018–1025, 2016.

Biberman, A.

E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. S. Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nature Commun., vol. 5, pp. 1–11, 2014.

Buckwalter, J. F.

Carroll, L.

L. Carroll, “Photonic packaging: Transforming silicon photonic integrated circuits into photonic devices,” Appl. Sci., vol. 6, no. 12, p. 426, 2016.

Cassan, E.

Chang, K.

K. Chang, R. Li, L. Ding, and S. Zhang, “Study of transmission line performance on through silicon interposer,” in Proc. IEEE Electron. Packag. Technol. Conf., 2014, pp. 284–287.

Chen, A.

G. Denoyer, A. Chen, B. Park, Y. Zhou, A. Santipo, and R. Russo, “Hybrid silicon photonic circuits and transceiver for 56 Gb/s NRZ 2.2 km transmission over single mode fiber,” in Proc. Eur. Conf. Opt. Commun., 2014, pp. 1–3, Paper PD.2.4.

Chen, Y.

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L. Luo, “High bandwidth on-chip silicon photonic interleaver,” Opt. Express, vol. 18, no. 22, pp. 23080–23087, 2010.

P. Dong, “Simultaneous wavelength locking of microring modulator array with a single monitoring signal,” Opt. Express, vol. 25, no. 14, pp. 16040–16046, 2017.

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V. Stojanović, “Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes,” Opt. Express, vol. 26, no. 10, 2018, Art. no. .

L. Vivien, “Zero-bias 40 Gbit/s germanium waveguide photodetector on silicon,” Opt. Express, vol. 20, no. 2, pp. 1096–1101, 2012.

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Q. Cheng, M. Bahadori, M. Glick, S. Rumley, and K. Bergman, “Recent advances in optical technologies for data centers: A review,” OSA Optica, vol. 5, no. 11, pp. 1354–1370, 2018.

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S. Rumley, “Optical interconnects for extreme scale computing systems,” Parallel Comput., vol. 64, pp. 65–80, 2017.

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