Abstract

The paper presents a comprehensive physical layer design and modeling platform for silicon photonic interconnects. The platform is based on explicit closed-form expressions for optical power penalties, derived for both signal-dependent and signal-independent noise contexts. Our models agree well with reported experimental measurements. We show how the modeling approach is used for the design space exploration of silicon photonic links and can be leveraged to optimize the wavelength-division multiplexed (WDM) capacity, evaluate the scalability, and study the sensitivity of the system to key device parameters. We apply the methodology to the design of microring-based silicon photonic links, including an evaluation of the impairments associated with cascaded ring modulators, as well as the spectral distortion and crosstalk effects of demultiplexer ring arrays for nonreturn-to-zero (NRZ) ON–OFF keying (OOK) modulated WDM signals. We show that the total capacity of a chip-to-chip microring-based WDM silicon photonic link designed with recently reported interconnect device parameters can approach 2 Tb/s realized with NRZ-OOK data modulation and 45 wavelengths each modulated at 45 Gb/s.

© 2015 IEEE

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