Abstract
Systems comprised of interconnected computing nodes present a number of design challenges. In this paper, we present and, then, analyze a design for a power-efficient, bandwidth-balanced system to meet a performance goal of 1 PFlops. We show that the on-node bandwidth required to support internode communications grows as the data-locality of an application decreases. We present an internode network that reduces this on-node bandwidth requirement to meet the limitations of the system building block (the macrochip) and introduce a new silicon photonics-based switch called the macroswitch. Our analysis demonstrates that a bandwidth-balanced system based on the macroswitch and photonic interconnects can achieve the stated goals with significantly lower power than an evolutionary system based on conventional multilevel switches.
© 2016 IEEE
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