Abstract

Photonic network-on-chip (NoC) architectures are emerging as a new paradigm to interconnect a large number of processing cores at chip level, meeting the pressing demand for extremely high bandwidth and low power consumption. Optical routers, which are typically composed of silicon waveguides and optical switches, play a key role in an on-chip photonic interconnection network. In this paper, we propose a micro-ring-resonator (MRR)-based, scalable, and non-blocking passive optical router design, namely the generic wavelength-routed optical router (GWOR). We first introduce the four 4 × 4 GWOR router structures and then show how to construct GWORs of larger sizes by using the proposed 4 × 4 GWORs as the primitive building blocks. The number of MRRs used in the proposed GWOR is the least among the existing passive router designs for the same network size. In addition, we show that the power loss experienced on GWORs is lower than other comparative designs. Furthermore, to improve the bandwidth and fault tolerance capability of the GWORs, the redundant GWOR (RGWOR) structure is presented. RGWOR can provide multiple routing paths between each pair of input-output ports by cascading different types of GWORs.

© 2011 IEEE

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2010 (4)

S. Assefa, F. Xia, Y. A. Vlasov, "Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects," Nature 464, 80-84 (2010).

P. Dong, "Low power and compact reconfigurable multiplexing devices based on silocon microring resonators," Opt. Exp. 18, 9852-9858 (2010).

N. Kirman, J. F. Martinez, "A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing," ACM SIGARCH Comp. Architect. News 38, 15-28 (2010).

R. Morrisand, A. K. Kodi, "Exploring the design of 64- and 256-core power efficient nanophotonic interconnect," IEEE J. Sel. Topics Quantum Electron. 16, 1386-1393 (2010).

2009 (4)

A. W. Poon, F. Xu, X. Luo, "Cascaded microresonator-based matrix switch for silicon on-chip optical interconnect," Proc. IEEE 97, 1216-1238 (2009).

L. Zhang, M. Yang, Y. Jiang, E. Regentova, "Architectures and routing schemes for optical network-on-chips," Comp. Elec. Eng. 35, 856-877 (2009).

L. Zhou, S. S. Djordjevic, R. Proietti, D. Ding, S. J. B. Yoo, R. Amirtharajah, V. Akella, "Design and evaluation of an arbitration-free passive optical crossbar for on-chip interconnection networks," Appl. Phys. A. 95, 1111-1118 (2009).

L. Zhou, K. Okamoto, S. J. B. Yoo, "Athermalizing and trimming of slotted silicon microring resonators with UV-sensitive PMMA upper-cladding," IEEE Photon. Technol. Lett. 21, 1175-1177 (2009).

2008 (4)

J. Schrauwen, D. V. Thourhout, R. Baets, "Trimming of silicon ring resonaror by electron beam induced compaction and strain," Opt. Exp. 16, 3738-3743 (2008).

A. Shacham, K. Bergman, L. P. Carloni, "Photonic networks-on-chip for future generations of chip multiprocessors," IEEE Trans. Comput. 57, 1246-1260 (2008).

N. Sherwood-Droz, "Optical 4$\,\times\,$4 hitless silicon router for optical networks-on-chip (NoC)," Opt. Exp. 16, 15915-15922 (2008).

A. W. Fang, "A racetrack mode-locked silicon evanescent laser," Opt. Exp. 16, 1393-1398 (2008).

2007 (2)

H. Park, "A hybrid AlGaInAs-silicon evanescent waveguide photodetector," Opt. Exp. 15, 6044-6052 (2007).

F. Xia, M. Rooks, L. Sekaric, Y. Vlasov, "Ultra-compact high order ring resonator filters using submicron silicon photonic wires for on-chip optical interconnects," Opt. Exp. 15, 11934-11941 (2007).

2006 (1)

M. Lipson, "Compact electro-optic modulators on a silicon chip," IEEE J. Sel. Topics Quantum Electron. 12, 1520-1526 (2006).

2005 (2)

M. Lipson, "Guiding, modulating, and emitting light on silicon-challenges and opportunities," J. Lightw. Technol. 23, 4222-4238 (2005).

Q. Xu, B. Schmidt, S. Pradhan, M. Lipson, "Micrometre-scale silicon electro-optic modulator," Nature 435, 325-327 (2005).

2000 (1)

B. E. Little, S. T. Chu, W. Pan, Y. Kokubun, "Microring resonator arrays for VLSI photonics," IEEE Photon. Technol. Lett. 12, 323-325 (2000).

1987 (1)

R. Soref, B. Bennett, "Electrooptical effects in silicon," IEEE J. Quantum Electron. 23, 123-129 (1987).

ACM SIGARCH Comp. Architect. News (1)

N. Kirman, J. F. Martinez, "A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing," ACM SIGARCH Comp. Architect. News 38, 15-28 (2010).

Appl. Phys. A. (1)

L. Zhou, S. S. Djordjevic, R. Proietti, D. Ding, S. J. B. Yoo, R. Amirtharajah, V. Akella, "Design and evaluation of an arbitration-free passive optical crossbar for on-chip interconnection networks," Appl. Phys. A. 95, 1111-1118 (2009).

Comp. Elec. Eng. (1)

L. Zhang, M. Yang, Y. Jiang, E. Regentova, "Architectures and routing schemes for optical network-on-chips," Comp. Elec. Eng. 35, 856-877 (2009).

IEEE J. Quantum Electron. (1)

R. Soref, B. Bennett, "Electrooptical effects in silicon," IEEE J. Quantum Electron. 23, 123-129 (1987).

IEEE J. Sel. Topics Quantum Electron. (2)

M. Lipson, "Compact electro-optic modulators on a silicon chip," IEEE J. Sel. Topics Quantum Electron. 12, 1520-1526 (2006).

R. Morrisand, A. K. Kodi, "Exploring the design of 64- and 256-core power efficient nanophotonic interconnect," IEEE J. Sel. Topics Quantum Electron. 16, 1386-1393 (2010).

IEEE Photon. Technol. Lett. (2)

B. E. Little, S. T. Chu, W. Pan, Y. Kokubun, "Microring resonator arrays for VLSI photonics," IEEE Photon. Technol. Lett. 12, 323-325 (2000).

L. Zhou, K. Okamoto, S. J. B. Yoo, "Athermalizing and trimming of slotted silicon microring resonators with UV-sensitive PMMA upper-cladding," IEEE Photon. Technol. Lett. 21, 1175-1177 (2009).

IEEE Trans. Comput. (1)

A. Shacham, K. Bergman, L. P. Carloni, "Photonic networks-on-chip for future generations of chip multiprocessors," IEEE Trans. Comput. 57, 1246-1260 (2008).

J. Lightw. Technol. (1)

M. Lipson, "Guiding, modulating, and emitting light on silicon-challenges and opportunities," J. Lightw. Technol. 23, 4222-4238 (2005).

Nature (2)

S. Assefa, F. Xia, Y. A. Vlasov, "Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects," Nature 464, 80-84 (2010).

Q. Xu, B. Schmidt, S. Pradhan, M. Lipson, "Micrometre-scale silicon electro-optic modulator," Nature 435, 325-327 (2005).

Opt. Exp. (6)

J. Schrauwen, D. V. Thourhout, R. Baets, "Trimming of silicon ring resonaror by electron beam induced compaction and strain," Opt. Exp. 16, 3738-3743 (2008).

F. Xia, M. Rooks, L. Sekaric, Y. Vlasov, "Ultra-compact high order ring resonator filters using submicron silicon photonic wires for on-chip optical interconnects," Opt. Exp. 15, 11934-11941 (2007).

P. Dong, "Low power and compact reconfigurable multiplexing devices based on silocon microring resonators," Opt. Exp. 18, 9852-9858 (2010).

A. W. Fang, "A racetrack mode-locked silicon evanescent laser," Opt. Exp. 16, 1393-1398 (2008).

N. Sherwood-Droz, "Optical 4$\,\times\,$4 hitless silicon router for optical networks-on-chip (NoC)," Opt. Exp. 16, 15915-15922 (2008).

H. Park, "A hybrid AlGaInAs-silicon evanescent waveguide photodetector," Opt. Exp. 15, 6044-6052 (2007).

Proc. IEEE (1)

A. W. Poon, F. Xu, X. Luo, "Cascaded microresonator-based matrix switch for silicon on-chip optical interconnect," Proc. IEEE 97, 1216-1238 (2009).

Other (10)

L. Schares, "A 17-Gb/s low-power optical receiver using a Ge-on-SOI photodiode with a 0.13-$\mu$m CMOS IC," Proc. Opt. Fiber Commun. Conf. (OFC) (2006) pp. 1-3.

A. W. Poon, F. Xu, X. Luo, "Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip," Proc. SPIE Int. Soc. Opt. Eng. (2008) pp. 12-21.

A. Liu, “Announcing the world's first 40G silicon laser modulator,” Intel (2007) http://blogs.intel.com/research-/2007/07/40g_modulator.php.

H. Gu, K. H. Mo, J. Xu, W. Zhang, "A low-power low-cost optical router for optical networks-on-chip in multiprocessor systems-on-chip," Proc. IEEE Comp. Soc. Annu. Symp. VLSI (ISVLSI) (2009) pp. 19-24.

A. Huang, "A 10 Gb/s photonic modulator and WDM MUX/DEMUX integrated with electronics in 0.13/spl mu/m SOI CMOS," Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC) (2006) pp. 922-929.

“The international technology roadmap for semiconductors (ITRS),” (2009) http://www.itrs.net/Links/2009ITRS/2009Chapters_2009Tables/2009_Interconnect.pdf.

C. Batten, "Building manycore processor-to-DRAM networks with monolithic silicon photonics," Proc. 16th IEEE Symp. High Perform. Interconnects (2008) pp. 21-30.

M. Briere, "System level assessment of an optical NoC in an MPSoC platform," Proc. Design, Auto. Test Eur. Opt. Conf. Exhib. (2007) pp. 1-6.

Y. Tao, "40 Gb/s Ge-on-SOI waveguide photodetectors by selective Ge growth," Proc. Opt. Fiber Commun./Nat. Fiber Opt. Eng. Conf. (2008) pp. 1-3.

L. Zhang, M. Yang, Y. Jiang, E. Regentova, E. Lu, "Generalized wavelength routed optical micronetwork in network-on-chip," Proc. 18th IASTED Int. Conf. Parallel Dist. Comp. Syst. (2006) pp. 698-703.

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