Abstract

We propose a universal method for constructing N-port nonblocking optical routers based on microring resonators. The topologies for five-, six-, seven-, and eight-port nonblocking optical routers are presented. As a case study, we compare the five-port optical router constructed by our method with the previously reported ones. The simulation results show that the mesh photonic network constructed by the proposed five-port optical routers has low insertion loss and high optical signal-to-noise ratio. Moreover, high-radix optical routers can be easily constructed by the proposed method, which can support more complicated and efficient network.

© 2012 IEEE

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  1. A. Shacham, K. Bergman, L. P. Carloni, "Photonic networks-on-chip for future generations of chip multiprocessors," IEEE Trans. Comput. 57, 1246-1260 (2008).
  2. M. K. Hung, Y. Yaoyao, W. Xiaowen, Z. Wei, L. Weichen, X. Jiang, "A hierarchical hybrid optical-electronic network-on-chip," Proc. IEEE Comput. Soc. Annu. Symp. (2010) pp. 327-332.
  3. D. A. B. Miller, "Device requirements for optical interconnects to silicon chips," Proc. IEEE 97, 1166-1185 (2009).
  4. B. G. Lee, A. Biberman, J. Chan, K. Bergman, "High-performance modulators and switches for silicon photonic networks-on-chip," IEEE J. Sel. Topics Quantum Electron. 16, 6-22 (2010).
  5. S. Assefa, F. N. A. Xia, Y. A. Vlasov, "Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects," Nature 464, 80-84 (2010).
  6. J. Ding, H. Chen, L. Yang, L. Zhang, R. Ji, Y. Tian, W. Zhu, Y. Lu, P. Zhou, R. Min, "Low-voltage, high-extinction-ratio, Mach-Zehnder silicon optical modulator for CMOS-compatible integration," Opt. Exp. 20, 3209-3218 (2012).
  7. P. Dong, S. F. Preble, M. Lipson, "All-optical compact silicon comb switch," Opt. Exp. 15, 9600-9605 (2007).
  8. H. X. Gu, J. Xu, W. Zhang, "A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip," Proc. Design, Autom. Test Eur. Conf. Exhib. (2009) pp. 3-8.
  9. A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, V. Stojanovic, "Silicon-photonic clos networks for global on-chip communication," Proc. 3rd ACM/IEEE Int. Symp. Netw.-on-Chip (2009) pp. 124-133.
  10. N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, M. Lipson, "Optical 4$\,\times\,$4 hitless silicon router for optical networks-on-chip (NoC)," Opt. Exp. 16, 15915-15922 (2008).
  11. M. Yang, W. M. J. Green, S. Assefa, J. Van Campenhout, B. G. Lee, C. V. Jahnes, F. E. Doany, C. L. Schow, J. A. Kash, Y. A. Vlasov, "Non-blocking 4$\,\times\,$4 electro-optic silicon switch for on-chip photonic networks," Opt. Exp. 19, 47-54 (2011).
  12. R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, "Microring-resonator-based four-port optical router for photonic networks-on-chip," Opt. Exp. 19, 18945-18955 (2011).
  13. R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, "Five-port optical router for photonic networks-on-chip," Opt. Exp. 19, 20258-20268 (2011).
  14. H. X. Gu, K. H. Mo, J. Xu, W. Zhang, "A low-power low-cost optical router for optical networks-on-chip in multiprocessor systems-on-chip," Proc. IEEE Comput. Soc. Annu. Symp. (2009) pp. 19-24.
  15. A. W. Poon, X. Luo, F. Xu, H. Chen, "Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection," Proc. IEEE 97, 1216-1238 (2009).
  16. A. Bianco, D. Cuda, R. Gaudino, G. Gavilanes, F. Neri, M. Petracca, "Scalability of optical interconnects based on microring resonators," IEEE Photon. Technol. Lett. 22, 1081-1083 (2010).
  17. J. Chan, A. Biberman, B. G. Lee, K. Bergman, "Insertion loss analysis in a photonic interconnection network for on-chip and off-chip communications," Proc. Annu. Meet. IEEE Lasers Electro-Opt. Soc. (2008) pp. 300-301.

2012 (1)

J. Ding, H. Chen, L. Yang, L. Zhang, R. Ji, Y. Tian, W. Zhu, Y. Lu, P. Zhou, R. Min, "Low-voltage, high-extinction-ratio, Mach-Zehnder silicon optical modulator for CMOS-compatible integration," Opt. Exp. 20, 3209-3218 (2012).

2011 (3)

M. Yang, W. M. J. Green, S. Assefa, J. Van Campenhout, B. G. Lee, C. V. Jahnes, F. E. Doany, C. L. Schow, J. A. Kash, Y. A. Vlasov, "Non-blocking 4$\,\times\,$4 electro-optic silicon switch for on-chip photonic networks," Opt. Exp. 19, 47-54 (2011).

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, "Microring-resonator-based four-port optical router for photonic networks-on-chip," Opt. Exp. 19, 18945-18955 (2011).

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, "Five-port optical router for photonic networks-on-chip," Opt. Exp. 19, 20258-20268 (2011).

2010 (3)

B. G. Lee, A. Biberman, J. Chan, K. Bergman, "High-performance modulators and switches for silicon photonic networks-on-chip," IEEE J. Sel. Topics Quantum Electron. 16, 6-22 (2010).

S. Assefa, F. N. A. Xia, Y. A. Vlasov, "Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects," Nature 464, 80-84 (2010).

A. Bianco, D. Cuda, R. Gaudino, G. Gavilanes, F. Neri, M. Petracca, "Scalability of optical interconnects based on microring resonators," IEEE Photon. Technol. Lett. 22, 1081-1083 (2010).

2009 (2)

D. A. B. Miller, "Device requirements for optical interconnects to silicon chips," Proc. IEEE 97, 1166-1185 (2009).

A. W. Poon, X. Luo, F. Xu, H. Chen, "Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection," Proc. IEEE 97, 1216-1238 (2009).

2008 (2)

A. Shacham, K. Bergman, L. P. Carloni, "Photonic networks-on-chip for future generations of chip multiprocessors," IEEE Trans. Comput. 57, 1246-1260 (2008).

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, M. Lipson, "Optical 4$\,\times\,$4 hitless silicon router for optical networks-on-chip (NoC)," Opt. Exp. 16, 15915-15922 (2008).

2007 (1)

P. Dong, S. F. Preble, M. Lipson, "All-optical compact silicon comb switch," Opt. Exp. 15, 9600-9605 (2007).

IEEE J. Sel. Topics Quantum Electron. (1)

B. G. Lee, A. Biberman, J. Chan, K. Bergman, "High-performance modulators and switches for silicon photonic networks-on-chip," IEEE J. Sel. Topics Quantum Electron. 16, 6-22 (2010).

IEEE Trans. Comput. (1)

A. Shacham, K. Bergman, L. P. Carloni, "Photonic networks-on-chip for future generations of chip multiprocessors," IEEE Trans. Comput. 57, 1246-1260 (2008).

IEEE Photon. Technol. Lett. (1)

A. Bianco, D. Cuda, R. Gaudino, G. Gavilanes, F. Neri, M. Petracca, "Scalability of optical interconnects based on microring resonators," IEEE Photon. Technol. Lett. 22, 1081-1083 (2010).

Nature (1)

S. Assefa, F. N. A. Xia, Y. A. Vlasov, "Reinventing germanium avalanche photodetector for nanophotonic on-chip optical interconnects," Nature 464, 80-84 (2010).

Opt. Exp. (6)

J. Ding, H. Chen, L. Yang, L. Zhang, R. Ji, Y. Tian, W. Zhu, Y. Lu, P. Zhou, R. Min, "Low-voltage, high-extinction-ratio, Mach-Zehnder silicon optical modulator for CMOS-compatible integration," Opt. Exp. 20, 3209-3218 (2012).

P. Dong, S. F. Preble, M. Lipson, "All-optical compact silicon comb switch," Opt. Exp. 15, 9600-9605 (2007).

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, M. Lipson, "Optical 4$\,\times\,$4 hitless silicon router for optical networks-on-chip (NoC)," Opt. Exp. 16, 15915-15922 (2008).

M. Yang, W. M. J. Green, S. Assefa, J. Van Campenhout, B. G. Lee, C. V. Jahnes, F. E. Doany, C. L. Schow, J. A. Kash, Y. A. Vlasov, "Non-blocking 4$\,\times\,$4 electro-optic silicon switch for on-chip photonic networks," Opt. Exp. 19, 47-54 (2011).

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, "Microring-resonator-based four-port optical router for photonic networks-on-chip," Opt. Exp. 19, 18945-18955 (2011).

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, W. Zhu, "Five-port optical router for photonic networks-on-chip," Opt. Exp. 19, 20258-20268 (2011).

Proc. IEEE (2)

D. A. B. Miller, "Device requirements for optical interconnects to silicon chips," Proc. IEEE 97, 1166-1185 (2009).

A. W. Poon, X. Luo, F. Xu, H. Chen, "Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection," Proc. IEEE 97, 1216-1238 (2009).

Other (5)

M. K. Hung, Y. Yaoyao, W. Xiaowen, Z. Wei, L. Weichen, X. Jiang, "A hierarchical hybrid optical-electronic network-on-chip," Proc. IEEE Comput. Soc. Annu. Symp. (2010) pp. 327-332.

J. Chan, A. Biberman, B. G. Lee, K. Bergman, "Insertion loss analysis in a photonic interconnection network for on-chip and off-chip communications," Proc. Annu. Meet. IEEE Lasers Electro-Opt. Soc. (2008) pp. 300-301.

H. X. Gu, K. H. Mo, J. Xu, W. Zhang, "A low-power low-cost optical router for optical networks-on-chip in multiprocessor systems-on-chip," Proc. IEEE Comput. Soc. Annu. Symp. (2009) pp. 19-24.

H. X. Gu, J. Xu, W. Zhang, "A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip," Proc. Design, Autom. Test Eur. Conf. Exhib. (2009) pp. 3-8.

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, V. Stojanovic, "Silicon-photonic clos networks for global on-chip communication," Proc. 3rd ACM/IEEE Int. Symp. Netw.-on-Chip (2009) pp. 124-133.

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