Abstract

A simulation of S-SEED switching based upon experimental data is developed that includes the effect of critical slowing down. The simulation's accuracy is demonstrated by close agreement with the results from experimental S-SEED switching. The simulation is subsequently used to understand how the phenomenon of critical slowing down applies to switching of an S-SEED and how the effect on photonic analog-to-digital (A/D) converter performance may be minimized.

© 2003 IEEE

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