Abstract

This study presents a design of the body contact in an 850 nm Si photodiode (PD) fabricated using standard 0.18-µm CMOS technology, and presents a systematic investigation of its effects on PD performance. This study confirms a good PD performance within 3 V bias and the establishment of the body current by directly measuring the body current, PD capacitance, and photocurrents. The body current from the biasing body contact was designed to eliminate the slow diffusion photocarriers in the substrate and increase bandwidth. The highest responsivity of 1.2 A/W was obtained from the PD without the body current, with biasing in the avalanche region. Adding the body bias increased the optimal bandwidth from 2.51 to 3.11 GHz, but reduced responsivity. However, the operating bias of the Si PD in the avalanche region was high, making it unsuitable for practical applications. While biasing PD at a low 3 V with a coordinated body bias, a bandwidth of 2.46 GHz was obtained with an acceptable responsivity of 0.1 A/W to allow low-voltage operation.

© 2013 IEEE

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  1. B. Yang, J. D. Schaub, S. M. Csutak, D. L. Rogers, J. C. Campbell, "10-Gb/s all-silicon optical receiver," IEEE Photon. Technol. Lett 15, 745-747 (2003).
  2. W. Z. Chen, Y. L. Cheng, D. S. Lin, "A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end," IEEE J. Solid-State Circuits 40, 1388-1396 (2005).
  3. C. Rooman, D. Coppee, M. Kuijk, "Asynchronous 250 Mb/s optical receivers with integrated detector in standard cmos technology," IEEE J. Solid State Circuits 35, 953-958 (2000).
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  5. M.-J. Lee, W.-Y. Choi, "A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product," Opt. Exp. 18, 24189-24194 (2010).
  6. W.-Z. Chen, S.-H. Huang, "A2.5 Gbps CMOS fully integrated optical receiver with lateral PIN detector," Proc. Custom Integrated Circuits Conf. (CICC) (2077) pp. 293-296.
  7. B. Ciftcioglu, L. Zhang, J. Zhang, J. R. Marciante, J. Zuegel, R. Sobolewski, H. Wu, "Integrated silicon PIN photodiodes using deep N-well in a standard 0.18- µm CMOS technology," J. Lightw. Technol. 3303-3313 (2009).
  8. K. Iiyama, H. Takamatsu, T. Maruyama, "Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18- µm CMOS process," IEEE Photon. Technol. Lett. 22, 932-934 (2010).
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  12. F. Tavernier, M. Steyaert, "A 5.5 Gbit/s optical receiver in 130 nm CMOS with speed-enhanced integrated photodiode," Proc. ESSCIRC (2010) pp. 542-545.
  13. S.-H. Huang, W.-Z. Chen, Y.-W. Chang, Y.-T. Huang, "A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18- µm CMOS technology," IEEE J. Solid-State Circuits 46, 1158-1169 (2011).
  14. J.-S. Youn, H.-S. Kang, M.-J. Lee, K.-Y. Park, W.-Y. Choi, "High-speed CMOS integrated optical receiver with an avalanche photodetector," IEEE Photon. Technol. Lett. 21, 1553-1555 (2009).
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  16. K. Iiyama, H. Takamatsu, T. Maruyama, "Silicon lateral avalanche photodiodes fabricated by standard 0.18 µm complementary metal-oxide-semiconductor process," Proc. Int. Conf. Solid State Devices Mater. (SSDM 2009) pp. 510-511.
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  18. W. K. Huang, Y. C. Liu, Y. M. Hsin, "A high-speed and high-responsivity photodiode in standard CMOS technology," IEEE Photon. Technol. Lett. 19, 197-199 (2007).
  19. F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, "Silicon photodiodes in standard CMOS technology," IEEE J. Sel. Topics Quantum Electron. 17, 730-740 (2011).

2011 (2)

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, Y.-T. Huang, "A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18- µm CMOS technology," IEEE J. Solid-State Circuits 46, 1158-1169 (2011).

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, "Silicon photodiodes in standard CMOS technology," IEEE J. Sel. Topics Quantum Electron. 17, 730-740 (2011).

2010 (2)

M.-J. Lee, W.-Y. Choi, "A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product," Opt. Exp. 18, 24189-24194 (2010).

K. Iiyama, H. Takamatsu, T. Maruyama, "Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18- µm CMOS process," IEEE Photon. Technol. Lett. 22, 932-934 (2010).

2009 (2)

B. Ciftcioglu, L. Zhang, J. Zhang, J. R. Marciante, J. Zuegel, R. Sobolewski, H. Wu, "Integrated silicon PIN photodiodes using deep N-well in a standard 0.18- µm CMOS technology," J. Lightw. Technol. 3303-3313 (2009).

J.-S. Youn, H.-S. Kang, M.-J. Lee, K.-Y. Park, W.-Y. Choi, "High-speed CMOS integrated optical receiver with an avalanche photodetector," IEEE Photon. Technol. Lett. 21, 1553-1555 (2009).

2008 (2)

K. Iiyama, N. Sannou, H. Takamatsu, "Avalanche amplification in silicon lateral photodiode fabricated by standard 0.18 µm CMOS process," IEICE Trans. Electron. E91-C, 1820-1823 (2008).

W. K. Huang, Y. C. Liu, Y. M. Hsin, "Bandwidth enhancement in Si photodiode by eliminating slow diffusion photocarriers," Electron. Lett. 44, 52-53 (2008).

2007 (2)

H. S. Kang, M. J. Lee, W. Y. Choi, "Si avalanche photodetectors fabricated in standard complementary metal oxide-semiconductor process," Appl. Phys. Lett. 90, 151118.1-151118.3 (2007).

W. K. Huang, Y. C. Liu, Y. M. Hsin, "A high-speed and high-responsivity photodiode in standard CMOS technology," IEEE Photon. Technol. Lett. 19, 197-199 (2007).

2005 (1)

W. Z. Chen, Y. L. Cheng, D. S. Lin, "A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end," IEEE J. Solid-State Circuits 40, 1388-1396 (2005).

2003 (1)

B. Yang, J. D. Schaub, S. M. Csutak, D. L. Rogers, J. C. Campbell, "10-Gb/s all-silicon optical receiver," IEEE Photon. Technol. Lett 15, 745-747 (2003).

2002 (1)

S. M. Csutak, J. D. Schaub, W. E. Wu, R. Shimer, J. C. Campbell, "CMOS-compatible high-speed planar silicon photodiodes fabricated on SOI substrates," IEEE J. Quantum Electron. 38, 193-196 (2002).

2000 (1)

C. Rooman, D. Coppee, M. Kuijk, "Asynchronous 250 Mb/s optical receivers with integrated detector in standard cmos technology," IEEE J. Solid State Circuits 35, 953-958 (2000).

1999 (1)

C. L. Schow, R. Li, J. D. Schaub, J. C. Campbell, "Design and implementation of high-speed planar Si photodiodes fabricated on SOI substrates," IEEE J. Quantum Electron. 35, 1478-1482 (1999).

Appl. Phys. Lett. (1)

H. S. Kang, M. J. Lee, W. Y. Choi, "Si avalanche photodetectors fabricated in standard complementary metal oxide-semiconductor process," Appl. Phys. Lett. 90, 151118.1-151118.3 (2007).

Electron. Lett. (1)

W. K. Huang, Y. C. Liu, Y. M. Hsin, "Bandwidth enhancement in Si photodiode by eliminating slow diffusion photocarriers," Electron. Lett. 44, 52-53 (2008).

IEEE J. Quantum Electron. (2)

S. M. Csutak, J. D. Schaub, W. E. Wu, R. Shimer, J. C. Campbell, "CMOS-compatible high-speed planar silicon photodiodes fabricated on SOI substrates," IEEE J. Quantum Electron. 38, 193-196 (2002).

C. L. Schow, R. Li, J. D. Schaub, J. C. Campbell, "Design and implementation of high-speed planar Si photodiodes fabricated on SOI substrates," IEEE J. Quantum Electron. 35, 1478-1482 (1999).

IEEE J. Sel. Topics Quantum Electron. (1)

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, Y.-M. Hsin, "Silicon photodiodes in standard CMOS technology," IEEE J. Sel. Topics Quantum Electron. 17, 730-740 (2011).

IEEE J. Solid State Circuits (1)

C. Rooman, D. Coppee, M. Kuijk, "Asynchronous 250 Mb/s optical receivers with integrated detector in standard cmos technology," IEEE J. Solid State Circuits 35, 953-958 (2000).

IEEE J. Solid-State Circuits (2)

W. Z. Chen, Y. L. Cheng, D. S. Lin, "A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end," IEEE J. Solid-State Circuits 40, 1388-1396 (2005).

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, Y.-T. Huang, "A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18- µm CMOS technology," IEEE J. Solid-State Circuits 46, 1158-1169 (2011).

IEEE Photon. Technol. Lett (1)

B. Yang, J. D. Schaub, S. M. Csutak, D. L. Rogers, J. C. Campbell, "10-Gb/s all-silicon optical receiver," IEEE Photon. Technol. Lett 15, 745-747 (2003).

IEEE Photon. Technol. Lett. (3)

K. Iiyama, H. Takamatsu, T. Maruyama, "Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18- µm CMOS process," IEEE Photon. Technol. Lett. 22, 932-934 (2010).

J.-S. Youn, H.-S. Kang, M.-J. Lee, K.-Y. Park, W.-Y. Choi, "High-speed CMOS integrated optical receiver with an avalanche photodetector," IEEE Photon. Technol. Lett. 21, 1553-1555 (2009).

W. K. Huang, Y. C. Liu, Y. M. Hsin, "A high-speed and high-responsivity photodiode in standard CMOS technology," IEEE Photon. Technol. Lett. 19, 197-199 (2007).

IEICE Trans. Electron. (1)

K. Iiyama, N. Sannou, H. Takamatsu, "Avalanche amplification in silicon lateral photodiode fabricated by standard 0.18 µm CMOS process," IEICE Trans. Electron. E91-C, 1820-1823 (2008).

J. Lightw. Technol. (1)

B. Ciftcioglu, L. Zhang, J. Zhang, J. R. Marciante, J. Zuegel, R. Sobolewski, H. Wu, "Integrated silicon PIN photodiodes using deep N-well in a standard 0.18- µm CMOS technology," J. Lightw. Technol. 3303-3313 (2009).

Opt. Exp. (1)

M.-J. Lee, W.-Y. Choi, "A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product," Opt. Exp. 18, 24189-24194 (2010).

Other (4)

W.-Z. Chen, S.-H. Huang, "A2.5 Gbps CMOS fully integrated optical receiver with lateral PIN detector," Proc. Custom Integrated Circuits Conf. (CICC) (2077) pp. 293-296.

W.-Z. Chen, S. H. Huang, G. W. Wu, C.-C. Liu, Y.-T. Huang, "A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer," Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC) (2007) pp. 396-399.

K. Iiyama, H. Takamatsu, T. Maruyama, "Silicon lateral avalanche photodiodes fabricated by standard 0.18 µm complementary metal-oxide-semiconductor process," Proc. Int. Conf. Solid State Devices Mater. (SSDM 2009) pp. 510-511.

F. Tavernier, M. Steyaert, "A 5.5 Gbit/s optical receiver in 130 nm CMOS with speed-enhanced integrated photodiode," Proc. ESSCIRC (2010) pp. 542-545.

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