Abstract

We proposed and experimentally demonstrated all-optical packet-level time slot assignment scheme with two optical buffers cascaded. The function of time-slot interchange (TSI) was successfully implemented on two and three optical packets at a data rate of 10Gb/s. Therefore, the functions of TSI on N packets should be implemented easily by the use of N1 stage optical buffer. On the basis of the above experiment, we carried out the TSI experiment on four packets with the same two-stage experimental setup. Furthermore, packets compression on three optical packets was also carried out with the same experimental setup. The shortest guard time of the packets compression can reach to 13 ns due to the limit of FPGA’s control accuracy. Due to the use of the same optical buffer, the proposed scheme has the advantages of simple and scalable configuration, modularization, and easy integration.

© 2013 Optical Society of America

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