Abstract

In this paper we present a procedure for the selection of the minimal dc reverse bias voltage of a high-speed optically triggered sampling circuit. The optically triggered sampling circuit is based on a PIN photodiode. A set of expressions that includes the optical power dependence of the current passing through the PIN photodiode is derived. Theoretical results of the procedure are experimentally verified with practical measurements obtained from a 3 giga samples per second (GS/s) and a 20GS/s sampling circuit implemented with commercial PIN photodiodes. Reductions in the signal-to-noise and distortion ratio of 37.28 and 6.9 dBs, as well as increments in the spurious free dynamic range of 31 and 19 dBs in the sampled signals, are respectively averted by the selection of the minimal reverse bias.

© 2012 Optical Society of America

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