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Architectural limits on optical-highway-based parallel computing

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Abstract

The high bandwidth available in optoelectronic interconnects is often suggested as making them suitable for use in high-performance computer systems. However, it will be shown that for problems where message sizes are small, the latency of an optoelectronic interprocessor interconnect will place a lower limit on the number of processors required to produce performance enhancement over a traditional electronic interconnect.

© 2006 Optical Society of America

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