Abstract

To achieve the wavefront phase-recovery stage of an adaptive-optics loop computed in real time for 32 × 32 or a greater number of subpupils in a Shack–Hartmann sensor, we present here, for what is to our knowledge the first time, preliminary results that we obtained by using innovative techniques: graphical processing units (GPUs) and field-programmable gate arrays (FPGAs). We describe the stream-computing paradigm of the GPU and adapt a zonal algorithm to take advantage of the parallel computational power of the GPU. We also present preliminary results we obtained by use of FPGAs on the same algorithm. GPUs have proved to be a promising technique, but FPGAs are already a feasible solution to adaptive-optics real-time requirements, even for a large number of subpupils.

© 2005 Optical Society of America

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References

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  1. R. Hudgin, “Wave-front reconstruction for compensated imaging,” J. Opt. Soc. Am. A 67, 375–378 (1977).
    [CrossRef]
  2. K. Moreland, E. Angel, “The FFT on a GPU,” in Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware (Eurographics Association, 2003), pp. 112–119.
  3. M. Olano, A. Lastra, “A shading language on graphics hardware: the pixelflow shading system,” in Proceedings of the 25th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 1998), pp. 159–168.
  4. E. Lindholm, M. J. Kilgard, H. Moreton, “A user-programmable vertex engine,” in Proceedings of the 28th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 2001), pp. 149–158.
  5. T. J. Purcell, “Ray tracing on a stream processor,” Ph.D. dissertation (Stanford University, 2004).
  6. J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
    [CrossRef]
  7. K. Fatahalian, J. Sugerman, P. Hanrahan, “Understanding the efficiency of GPU algorithms for matrix–matrix multiplication,” presented at the SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2004, Grenoble, France, 29–30 August 2004.

2003

J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
[CrossRef]

1977

R. Hudgin, “Wave-front reconstruction for compensated imaging,” J. Opt. Soc. Am. A 67, 375–378 (1977).
[CrossRef]

Angel, E.

K. Moreland, E. Angel, “The FFT on a GPU,” in Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware (Eurographics Association, 2003), pp. 112–119.

Bolz, J.

J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
[CrossRef]

Farmer, I.

J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
[CrossRef]

Fatahalian, K.

K. Fatahalian, J. Sugerman, P. Hanrahan, “Understanding the efficiency of GPU algorithms for matrix–matrix multiplication,” presented at the SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2004, Grenoble, France, 29–30 August 2004.

Grinspun, E.

J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
[CrossRef]

Hanrahan, P.

K. Fatahalian, J. Sugerman, P. Hanrahan, “Understanding the efficiency of GPU algorithms for matrix–matrix multiplication,” presented at the SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2004, Grenoble, France, 29–30 August 2004.

Hudgin, R.

R. Hudgin, “Wave-front reconstruction for compensated imaging,” J. Opt. Soc. Am. A 67, 375–378 (1977).
[CrossRef]

Kilgard, M. J.

E. Lindholm, M. J. Kilgard, H. Moreton, “A user-programmable vertex engine,” in Proceedings of the 28th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 2001), pp. 149–158.

Lastra, A.

M. Olano, A. Lastra, “A shading language on graphics hardware: the pixelflow shading system,” in Proceedings of the 25th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 1998), pp. 159–168.

Lindholm, E.

E. Lindholm, M. J. Kilgard, H. Moreton, “A user-programmable vertex engine,” in Proceedings of the 28th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 2001), pp. 149–158.

Moreland, K.

K. Moreland, E. Angel, “The FFT on a GPU,” in Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware (Eurographics Association, 2003), pp. 112–119.

Moreton, H.

E. Lindholm, M. J. Kilgard, H. Moreton, “A user-programmable vertex engine,” in Proceedings of the 28th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 2001), pp. 149–158.

Olano, M.

M. Olano, A. Lastra, “A shading language on graphics hardware: the pixelflow shading system,” in Proceedings of the 25th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 1998), pp. 159–168.

Purcell, T. J.

T. J. Purcell, “Ray tracing on a stream processor,” Ph.D. dissertation (Stanford University, 2004).

Schroder, P.

J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
[CrossRef]

Sugerman, J.

K. Fatahalian, J. Sugerman, P. Hanrahan, “Understanding the efficiency of GPU algorithms for matrix–matrix multiplication,” presented at the SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2004, Grenoble, France, 29–30 August 2004.

ACM (Assoc. Comput. Mach.) Trans. Graph.

J. Bolz, I. Farmer, E. Grinspun, P. Schroder, “Sparse matrix solvers on the GPU: conjugate gradients and multigrid,” ACM (Assoc. Comput. Mach.) Trans. Graph. 22, 917–924 (2003).
[CrossRef]

J. Opt. Soc. Am. A

R. Hudgin, “Wave-front reconstruction for compensated imaging,” J. Opt. Soc. Am. A 67, 375–378 (1977).
[CrossRef]

Other

K. Moreland, E. Angel, “The FFT on a GPU,” in Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware (Eurographics Association, 2003), pp. 112–119.

M. Olano, A. Lastra, “A shading language on graphics hardware: the pixelflow shading system,” in Proceedings of the 25th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 1998), pp. 159–168.

E. Lindholm, M. J. Kilgard, H. Moreton, “A user-programmable vertex engine,” in Proceedings of the 28th Annual Conference on Computer Graphics and Interactive Techniques (Association for Computing Machinery Press, 2001), pp. 149–158.

T. J. Purcell, “Ray tracing on a stream processor,” Ph.D. dissertation (Stanford University, 2004).

K. Fatahalian, J. Sugerman, P. Hanrahan, “Understanding the efficiency of GPU algorithms for matrix–matrix multiplication,” presented at the SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2004, Grenoble, France, 29–30 August 2004.

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Figures (7)

Fig. 1
Fig. 1

Elements of the Hudgin recovery algorithm modified to take into account considerations of the domain boundaries.

Fig. 2
Fig. 2

Centroid algorithm mapped to a GPU.

Fig. 3
Fig. 3

Hudgin algorithm mapped to a GPU.

Fig. 4
Fig. 4

Error evolution of Hudgin modified algorithm for subpupils of sizes 32 × 32, 64 × 64, 128 × 128, and 256 × 256. The circles indicate steps performed within 5–10 ms.

Fig. 5
Fig. 5

Execution times for GPU implementation of the modified Hudgin phase recovery.

Fig. 6
Fig. 6

Block diagram of the parallel computation of the centroids in FPGAs.

Fig. 7
Fig. 7

Data storage and algorithm outline for Hudgin implementation in FPGAs.

Tables (2)

Tables Icon

Table 1 Execution Times for a Centroid Algorithm Implemented on a GPU

Tables Icon

Table 2 Execution Times for the Hudgin Algorithm Implemented on GPUs and FPGAsa

Equations (6)

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Φ j , k = 1 4 ( Φ j + 1 , k + Φ j 1 , k + Φ j , k + 1 + Φ j , k 1 ) + 1 4 ( S j , k 1 S j 1 , k 1 + S j , k 2 S j , k 1 2 ) ,
S j , k 1 = Φ j , k Φ j + 1 , k , S j , k 2 = Φ j , k Φ j , k + 1
Φ j , k = S j , k 1 + Φ j + 1 , k , Φ j , k = S j , k 2 + Φ j , k + 1 , Φ j , k = S j 1 , k 1 + Φ j 1 , k , Φ j , k = S j , k 1 2 + Φ j , k 1 .
4 Φ j , k = ( S j , k 1 + Φ j + 1 , k ) + ( S j , k 2 + Φ j , k + 1 ) + ( S j 1 , k 1 + Φ j 1 , k ) + ( S j , k 1 2 + Φ j , k 1 ) .
N u ( j , k ) = { 1 , if S j , k 1 Λ Φ j + 1 , k 0 , otherwise . ,
N = N u ( j , k ) + N d ( j , k ) + N r ( j , k ) + N l ( j , k ) , Φ j , k = 1 N [ N u ( j , k ) ( S j , k 1 + Φ j + 1 , k ) + N r ( j , k ) ( S j , k 2 + Φ j , k + 1 ) + N d ( j , k ) ( S j 1 , k 1 + Φ j 1 , k ) + N l ( j , k ) ( S j , k 1 2 + Φ j , k 1 ) ] .

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