Abstract

A vertical-cavity surface-emitting laser (VCSEL) driver design that utilizes a novel push-pull circuit topology is described. The VCSEL driver design can provide both a current pushing and a current pulling mechanism and therefore is capable of producing symmetric rise and fall times. The design was implemented in a 0.18-μm foundry n-well complementary metal-oxide semiconductor technology and operates at data rates up to 2.5 Gb/s with a power consumption of 45 mW at an average optical output power of 1 mW.

© 2004 Optical Society of America

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  1. G. E. Moore, “Cramming more components onto integrated circuits,” Proc. IEEE 86, 82–85 (1998).
    [CrossRef]
  2. D. A. B. Miller, “Rationale and challenges for optical interconnects to electronic chips,” Proc. IEEE 88, 728–749 (2000).
    [CrossRef]
  3. A. F. J. Levi, “Optical interconnects in systems,” Proc. IEEE 88, 750–757 (2000).
    [CrossRef]
  4. D. V. Plant, A. G. Kirk, “Optical interconnects at the chip and board level: challenges and solutions,” Proc. IEEE 88, 806–817 (2000).
    [CrossRef]
  5. D. V. Plant, M. B. Venditti, E. Laprise, J. Faucher, K. Razavi, M. Chateauneuf, A. G. Kirk, J. D. Ahearn, “A 256 channel bi-directional optical interconnect using VCSELs and photodiodes on CMOS,” J. Lightwave Technol. 19, 1093–1103 (2001).
    [CrossRef]
  6. M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
    [CrossRef]
  7. B. Madhavan, A. F. J. Levi, “Low power 2.5 Gbit/s VCSEL driver in 0.5 μm CMOS technology,” Electron. Lett. 34, 178–179 (1998).
    [CrossRef]
  8. J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.
  9. R. Annen, H. Melchoir, “Fully integrated 0.25 μm CMOS VCSEL driver with current peaking,” Electron. Lett. 38, 174–175 (2002).
    [CrossRef]
  10. R. Annen, H. Melchoir, R. King, K. J. Ebeling, “Fully integrated 0.25 μm CMOS 4 × 8 VCSEL driver array IC with 2.5 Gbits/s/channel bit rate and low cross talk,” in Proceedings of the Lasers and Electro-Optics Society: The 14th Annual Meeting of the IEEE, (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 2, pp. 449–450.
  11. A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
    [CrossRef]
  12. PM8355 Quad PHYII data sheet, (PMC-Sierra, Burnaby, British Columbia, Canada2003).

2003

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

2002

R. Annen, H. Melchoir, “Fully integrated 0.25 μm CMOS VCSEL driver with current peaking,” Electron. Lett. 38, 174–175 (2002).
[CrossRef]

2001

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

D. V. Plant, M. B. Venditti, E. Laprise, J. Faucher, K. Razavi, M. Chateauneuf, A. G. Kirk, J. D. Ahearn, “A 256 channel bi-directional optical interconnect using VCSELs and photodiodes on CMOS,” J. Lightwave Technol. 19, 1093–1103 (2001).
[CrossRef]

2000

D. A. B. Miller, “Rationale and challenges for optical interconnects to electronic chips,” Proc. IEEE 88, 728–749 (2000).
[CrossRef]

A. F. J. Levi, “Optical interconnects in systems,” Proc. IEEE 88, 750–757 (2000).
[CrossRef]

D. V. Plant, A. G. Kirk, “Optical interconnects at the chip and board level: challenges and solutions,” Proc. IEEE 88, 806–817 (2000).
[CrossRef]

1998

B. Madhavan, A. F. J. Levi, “Low power 2.5 Gbit/s VCSEL driver in 0.5 μm CMOS technology,” Electron. Lett. 34, 178–179 (1998).
[CrossRef]

G. E. Moore, “Cramming more components onto integrated circuits,” Proc. IEEE 86, 82–85 (1998).
[CrossRef]

Ahearn, J. D.

Annen, R.

R. Annen, H. Melchoir, “Fully integrated 0.25 μm CMOS VCSEL driver with current peaking,” Electron. Lett. 38, 174–175 (2002).
[CrossRef]

R. Annen, H. Melchoir, R. King, K. J. Ebeling, “Fully integrated 0.25 μm CMOS 4 × 8 VCSEL driver array IC with 2.5 Gbits/s/channel bit rate and low cross talk,” in Proceedings of the Lasers and Electro-Optics Society: The 14th Annual Meeting of the IEEE, (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 2, pp. 449–450.

Chateauneuf, M.

Ebeling, K. J.

R. Annen, H. Melchoir, R. King, K. J. Ebeling, “Fully integrated 0.25 μm CMOS 4 × 8 VCSEL driver array IC with 2.5 Gbits/s/channel bit rate and low cross talk,” in Proceedings of the Lasers and Electro-Optics Society: The 14th Annual Meeting of the IEEE, (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 2, pp. 449–450.

Endoh, T.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Faucher, J.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

D. V. Plant, M. B. Venditti, E. Laprise, J. Faucher, K. Razavi, M. Chateauneuf, A. G. Kirk, J. D. Ahearn, “A 256 channel bi-directional optical interconnect using VCSELs and photodiodes on CMOS,” J. Lightwave Technol. 19, 1093–1103 (2001).
[CrossRef]

Fujiwara, I.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Kataoka, K.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

King, R.

R. Annen, H. Melchoir, R. King, K. J. Ebeling, “Fully integrated 0.25 μm CMOS 4 × 8 VCSEL driver array IC with 2.5 Gbits/s/channel bit rate and low cross talk,” in Proceedings of the Lasers and Electro-Optics Society: The 14th Annual Meeting of the IEEE, (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 2, pp. 449–450.

Kirk, A. G.

Laprise, E.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

D. V. Plant, M. B. Venditti, E. Laprise, J. Faucher, K. Razavi, M. Chateauneuf, A. G. Kirk, J. D. Ahearn, “A 256 channel bi-directional optical interconnect using VCSELs and photodiodes on CMOS,” J. Lightwave Technol. 19, 1093–1103 (2001).
[CrossRef]

Laprise, P.-O.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

Lee, J.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

Lee, W.-J.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

Levi, A. F. J.

A. F. J. Levi, “Optical interconnects in systems,” Proc. IEEE 88, 750–757 (2000).
[CrossRef]

B. Madhavan, A. F. J. Levi, “Low power 2.5 Gbit/s VCSEL driver in 0.5 μm CMOS technology,” Electron. Lett. 34, 178–179 (1998).
[CrossRef]

Lim, J.-W.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

Lugo, J. E.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

Madhavan, B.

B. Madhavan, A. F. J. Levi, “Low power 2.5 Gbit/s VCSEL driver in 0.5 μm CMOS technology,” Electron. Lett. 34, 178–179 (1998).
[CrossRef]

Masuoka, F.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Melchoir, H.

R. Annen, H. Melchoir, “Fully integrated 0.25 μm CMOS VCSEL driver with current peaking,” Electron. Lett. 38, 174–175 (2002).
[CrossRef]

R. Annen, H. Melchoir, R. King, K. J. Ebeling, “Fully integrated 0.25 μm CMOS 4 × 8 VCSEL driver array IC with 2.5 Gbits/s/channel bit rate and low cross talk,” in Proceedings of the Lasers and Electro-Optics Society: The 14th Annual Meeting of the IEEE, (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 2, pp. 449–450.

Miller, D. A. B.

D. A. B. Miller, “Rationale and challenges for optical interconnects to electronic chips,” Proc. IEEE 88, 728–749 (2000).
[CrossRef]

Moore, G. E.

G. E. Moore, “Cramming more components onto integrated circuits,” Proc. IEEE 86, 82–85 (1998).
[CrossRef]

Ogura, T.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Okihara, M.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Plant, D. V.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

D. V. Plant, M. B. Venditti, E. Laprise, J. Faucher, K. Razavi, M. Chateauneuf, A. G. Kirk, J. D. Ahearn, “A 256 channel bi-directional optical interconnect using VCSELs and photodiodes on CMOS,” J. Lightwave Technol. 19, 1093–1103 (2001).
[CrossRef]

D. V. Plant, A. G. Kirk, “Optical interconnects at the chip and board level: challenges and solutions,” Proc. IEEE 88, 806–817 (2000).
[CrossRef]

Razavi, K.

Sakuraba, H.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Song, S.-J.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

Song, Su. S.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

Tanabe, A.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Umetami, M.

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

Venditti, M. B.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

D. V. Plant, M. B. Venditti, E. Laprise, J. Faucher, K. Razavi, M. Chateauneuf, A. G. Kirk, J. D. Ahearn, “A 256 channel bi-directional optical interconnect using VCSELs and photodiodes on CMOS,” J. Lightwave Technol. 19, 1093–1103 (2001).
[CrossRef]

Yoo, H.-J.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

Electron. Lett.

B. Madhavan, A. F. J. Levi, “Low power 2.5 Gbit/s VCSEL driver in 0.5 μm CMOS technology,” Electron. Lett. 34, 178–179 (1998).
[CrossRef]

R. Annen, H. Melchoir, “Fully integrated 0.25 μm CMOS VCSEL driver with current peaking,” Electron. Lett. 38, 174–175 (2002).
[CrossRef]

IEEE J. Sel. Top. Quantum Electron.

M. B. Venditti, E. Laprise, J. Faucher, P.-O. Laprise, J. E. Lugo, D. V. Plant, “Design and test of an optoelectronic-VLSI (OE-VLSI) chip with 540 element receiver/transmitter arrays using differential optical signaling,” IEEE J. Sel. Top. Quantum Electron. 9, 361–379 (2003).
[CrossRef]

IEEE J. Solid-State Circuits

A. Tanabe, M. Umetami, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, F. Masuoka, “0.18 μm CMOS 10-GB/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold coltage fluctuation,” IEEE J. Solid-State Circuits 36, 988–996 (2001).
[CrossRef]

J. Lightwave Technol.

Proc. IEEE

G. E. Moore, “Cramming more components onto integrated circuits,” Proc. IEEE 86, 82–85 (1998).
[CrossRef]

D. A. B. Miller, “Rationale and challenges for optical interconnects to electronic chips,” Proc. IEEE 88, 728–749 (2000).
[CrossRef]

A. F. J. Levi, “Optical interconnects in systems,” Proc. IEEE 88, 750–757 (2000).
[CrossRef]

D. V. Plant, A. G. Kirk, “Optical interconnects at the chip and board level: challenges and solutions,” Proc. IEEE 88, 806–817 (2000).
[CrossRef]

Other

R. Annen, H. Melchoir, R. King, K. J. Ebeling, “Fully integrated 0.25 μm CMOS 4 × 8 VCSEL driver array IC with 2.5 Gbits/s/channel bit rate and low cross talk,” in Proceedings of the Lasers and Electro-Optics Society: The 14th Annual Meeting of the IEEE, (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 2, pp. 449–450.

J. Lee, J.-W. Lim, S.-J. Song, Su. S. Song, W.-J. Lee, H.-J. Yoo, “Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections,” in Proceedings of IEEE International Symposium on Circuitsand Systems (Institute of Electrical and Electronics Engineers, New York, 2001), Vol. 4, pp. 702–705.

PM8355 Quad PHYII data sheet, (PMC-Sierra, Burnaby, British Columbia, Canada2003).

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Figures (2)

Fig. 1
Fig. 1

Schematic of the push-pull VCSEL driver.

Fig. 2
Fig. 2

Eye pattern of the detected optical output at 2.5 Gb/s.

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