Smart-pixel architectures, which use the cells of field-programmable gate arrays to provide electronic functionality and intraplane communication, offer a general-purpose approach to exploiting new application areas that would benefit from this kind of structure. One such area, that of the encryption of digital data, is discussed here. Some of the characteristics exhibited by encryption algorithms and ways in which these are applicable to smart-pixel technology are described. The implementation of an algorithm in current use, the SAFER K-64, and its interfacing to an electronic host are then considered in detail. It is shown that this encryption algorithm maps well onto smart-pixel technology because it involves only parallel data transfers, simple regular operations, and interconnections plus a relatively low rate of transfer to the host.
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