Abstract

A parallel data-communication scheme is described for interchip communication with free-space optics. We present a proof-of-concept and feasibility demonstration of a practical modular packaging approach in which free-space optical interconnect modules can be simply integrated on top of an electronic multichip module (MCM). Our packaging architecture is based on a modified folded 4-f imaging system that is implemented with off-the-shelf optics, conventional electronic packaging techniques, and passive assembly techniques to yield a potentially low-cost packaging solution. The prototype system, as built, supports 48 independent free-space channels with eight separate laser and detector chips, in which each chip consists of a one-dimensional array of 12 devices. All chips are assembled on a single ceramic carrier together with three silicon complementary metal-oxide semiconductor chips. Parallel optoelectronic (OE) free-space interconnections are demonstrated at a speed of 200 MHz. The system is compact at only 10 in.3 (∼164 cm3) and is scalable because it can easily accommodate additional chips as well as two-dimensional OE device arrays for increased interconnection density.

© 2000 Optical Society of America

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    [CrossRef]
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    [CrossRef]
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  23. Optical Research Associates, 3280 East Foothill Boulevard, Suit 300, Pasadena, Calif. 91107.
  24. ARMA Design, 7887 Dunbrook Road, Suite A, San Diego, Calif. 92126.
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1999 (2)

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

X. Zheng, P. Marchand, D. Huang, O. Kibar, N. Ozkan, S. Esener, “Optomechanical design and characterization of a printed-circuit-board-based free-space optical interconnect package,” Appl. Opt. 38, 5631–5640 (1999).
[CrossRef]

1998 (4)

1997 (4)

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

D. A. B. Miller, “Physical reasons for optical interconnection,” Intl. J. Optoelectron. 11, 155–168 (1997).

A. L. Lentine, D. J. Reiley, R. A. Novotny, R. L. Morrison, J. M. Sasian, M. G. Beckman, D. B. Buchhoz, S. J. Hinterlong, T. J. Cloonan, G. W. Richards, F. B. McCormick, “Asynchronous transfer mode distribution network by use of an optoelectronic VLSI switching chip,” Appl. Opt. 36, 1804–1814 (1997).
[CrossRef] [PubMed]

1996 (2)

A. V. Krishnamoorthy, D. A. B. Miller, “Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. Lee, “Tolerancing of board-level-free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

1994 (2)

1992 (1)

1991 (1)

F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

1988 (1)

1987 (1)

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

1986 (1)

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

1985 (1)

1984 (1)

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Acciai, S.

Athale, R. A.

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Beckman, M. G.

Bergman, L. A.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Betzos, G. A.

Bounnak, S.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Bristow, J.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Buchhoz, D. B.

Chirovsky, L. M. F.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Cloonan, T. J.

Crisci, R. J.

Cunningham, J. E.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

D’Asaro, L. A.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Drabik, T. J.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Efron, U.

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

Esener, S.

Esener, S. C.

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

S. C. Esener, P. Marchand, “3D optoelectronic stacked processors: design and analysis,” in Optics in Computing ‘98, P. Chavel, D. Miller, H. Thienpont, eds., Proc SPIE3490, 541–545 (1998).

Feldman, M.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Feldman, M. R.

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

Goodman, J. W.

R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectric chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
[CrossRef] [PubMed]

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Goosen, K. W.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Guest, C. C.

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Hesselink, L.

Hibbs-Brenner, M.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Hinterlong, S. J.

Hinton, H. S.

Hobson, W. S.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Huang, D.

Hui, S. P.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Johnston, A. R.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Kiamilev, F.

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Kibar, O.

Kostuk, R. K.

Krishnamoorthy, A. V.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

A. V. Krishnamoorthy, D. A. B. Miller, “Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Kung, S. C.

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Lee, S.

Lee, S. H.

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1570 (1994).
[CrossRef]

F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Lehman, J.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Leibenguth, R. E.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Lentine, A. L.

Leonberger, F. J.

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Liu, Y.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Ma, J.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. Lee, “Tolerancing of board-level-free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1570 (1994).
[CrossRef]

Mannoni, A.

Marchand, P.

Marchand, P. J.

G. Yayla, P. J. Marchand, S. Esener, “Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies,” Appl. Opt. 37, 205–227 (1998).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Marta, T.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

McCormick, F. B.

Miller, D. A. B.

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

D. A. B. Miller, “Physical reasons for optical interconnection,” Intl. J. Optoelectron. 11, 155–168 (1997).

A. V. Krishnamoorthy, D. A. B. Miller, “Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

Mitkas, P. A.

Morgan, R. A.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Morrison, R. L.

Neilson, D. T.

Nixon, R.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Nohava, J.

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Novotny, R. A.

Ozguz, V.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. Lee, “Tolerancing of board-level-free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1570 (1994).
[CrossRef]

Ozkan, N.

Patra, S.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. Lee, “Tolerancing of board-level-free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1570 (1994).
[CrossRef]

Quercioli, F.

Reiley, D. J.

Richards, G. W.

Sasian, J. M.

Schenfeld, E.

Tiribilli, B.

Tseng, B. J.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Urquhart, K. S.

Walker, J. A.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Walker, S. L.

Wojcik, M. J.

Wu, W. H.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Wynn, J. D.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Yayla, G.

Yayla, G. I.

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

Yu, P.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

Yu, P. K. L.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

Zaleta, D.

Zheng, X.

Zydzik, G. J.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Appl. Opt. (11)

G. A. Betzos, P. A. Mitkas, “Performance evaluation of massively parallel processing architectures with three-dimensional optical interconnections,” Appl. Opt. 37, 315–325 (1998).
[CrossRef]

R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectric chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
[CrossRef] [PubMed]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

G. Yayla, P. J. Marchand, S. Esener, “Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies,” Appl. Opt. 37, 205–227 (1998).
[CrossRef]

F. B. McCormick, T. J. Cloonan, A. L. Lentine, J. M. Sasian, R. L. Morrison, M. G. Beckman, S. L. Walker, M. J. Wojcik, S. J. Hinterlong, R. J. Crisci, R. A. Novotny, H. S. Hinton, “Five-stage free-space optical switching network with field-effect transistor self-electro-optic-effect-device smart-pixel arrays,” Appl. Opt., Special Issue on Optical Computing 33, 1601–1618 (1994).

A. L. Lentine, D. J. Reiley, R. A. Novotny, R. L. Morrison, J. M. Sasian, M. G. Beckman, D. B. Buchhoz, S. J. Hinterlong, T. J. Cloonan, G. W. Richards, F. B. McCormick, “Asynchronous transfer mode distribution network by use of an optoelectronic VLSI switching chip,” Appl. Opt. 36, 1804–1814 (1997).
[CrossRef] [PubMed]

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. Lee, “Tolerancing of board-level-free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

D. T. Neilson, E. Schenfeld, “Plastic modules for free-space optical interconnects,” Appl. Opt. 37, 2944–2951 (1998).
[CrossRef]

F. Quercioli, B. Tiribilli, A. Mannoni, S. Acciai, “Optomechanics with LEGO,” Appl. Opt. 37, 3408–3416 (1998).
[CrossRef]

X. Zheng, P. Marchand, D. Huang, O. Kibar, N. Ozkan, S. Esener, “Optomechanical design and characterization of a printed-circuit-board-based free-space optical interconnect package,” Appl. Opt. 38, 5631–5640 (1999).
[CrossRef]

IEEE J. Lightwave Technol. (1)

F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

IEEE J. Sel. Top. Quantum Optoelectron. (1)

A. V. Krishnamoorthy, D. A. B. Miller, “Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

IEEE Photon. Technol. Lett. (1)

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

IEEE Trans. Electron. Devices (1)

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706–714 (1987).
[CrossRef]

Intl. J. Optoelectron. (1)

D. A. B. Miller, “Physical reasons for optical interconnection,” Intl. J. Optoelectron. 11, 155–168 (1997).

J. Parallel Distrib. Comput. (2)

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20–35 (1997).
[CrossRef]

Opt. Eng. (2)

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1570 (1994).
[CrossRef]

Proc. IEEE (1)

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Other (5)

R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE2811, 232–242 (1996).

Optical Research Associates, 3280 East Foothill Boulevard, Suit 300, Pasadena, Calif. 91107.

ARMA Design, 7887 Dunbrook Road, Suite A, San Diego, Calif. 92126.

Versatronics American, Hayward Melville, 1110 Madera Drive, Tracy, Calif. 95376–8951; http://versatronics.tstma.com/Specs.html .

S. C. Esener, P. Marchand, “3D optoelectronic stacked processors: design and analysis,” in Optics in Computing ‘98, P. Chavel, D. Miller, H. Thienpont, eds., Proc SPIE3490, 541–545 (1998).

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Figures (14)

Fig. 1
Fig. 1

Architecture for multichip interconnection with free-space optics

Fig. 2
Fig. 2

System schematics. 1D OE chips are optically connected by a vertical system. All the VCSEL arrays are optically connected to their corresponding detector arrays (one-to-one diagonally).

Fig. 3
Fig. 3

(a) Optical system configuration with only commercially available devices. (b) Code V view of the optics.

Fig. 4
Fig. 4

Multichip carrier is composed of two layers: (a) baseboard (ceramic), (b) chip-registration board. Fiducial pins and pinholes are used to register all the boards. (c) Multichip carrier after assembly.

Fig. 5
Fig. 5

Chip transfer sequence. The VCSEL and detector chips are attached to a temporary transparent mask (top). The temporary substrate is aligned to a cavity composed of the baseboard and the chip-registration board (or ring; middle). All the OE chips are released from the temporary substrate while they are die attached on the multichip carrier (bottom).

Fig. 6
Fig. 6

OE module and FSOI module after assembly. (a) Optoelectronic module, (b) plastic free-space optics module snapped onto the OE module.

Fig. 7
Fig. 7

Free-space OE interconnection module interfaced with traditional PCB-based electronics. (a) Test setup; (b) schematic of the signal path in the test setup.

Fig. 8
Fig. 8

Time-domain reflectometry measurements to characterize parasitic LC and discontinuity in transmission loss (T.L.) on the PCB.

Fig. 9
Fig. 9

System-level simulation with H Spice. The system maximum output is 250 MHz.

Fig. 10
Fig. 10

200-MHz OE parallel interconnection is achieved through one VCSEL–MSM link. The two curves in the figure are outputs from different channels on the same chip. (a) Two channels in the same single link; (b) single-link works at 200 MHz with square wave input.

Fig. 11
Fig. 11

Traces of independent VCSEL–MSM links sharing the same optical aperture.

Fig. 12
Fig. 12

Two-stage interconnection. The upper curve is the input signal for the first link. The lower curve is the output signal after two-stage interconnection

Fig. 13
Fig. 13

Mirror tilt for misalignment compensation.

Fig. 14
Fig. 14

Worst case of in-plane rotation misalignment.

Equations (5)

Equations on this page are rendered with MathJax. Learn more.

x, y=-x+2f-d-f2Rθx+2fδxR-2fδα; -y+2f-d-f2Rθy+2fδyR-2fδβ,
R=f2/f-d,
x, y-x+2δx-2fδα; -y+2δy-2fδβ.
dx=δVx+δMx+2δx-2fδα, dy=δVy+δMy+2δy-2fδβ,
γ+ϕd/2a,

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