Abstract

We present a proof of concept and a feasibility demonstration of a practical packaging approach in which free-space optical interconnects (FSOI’s) can be integrated simply on electronic multichip modules (MCM’s) for intra-MCM–board interconnects. Our system-level packaging architecture is based on a modified folded 4f imaging system that has been implemented with only off-the-shelf optics, conventional electronic packaging, and passive-assembly techniques to yield a potentially low-cost and manufacturable packaging solution. The prototypical system as built supports 48 independent FSOI channels with 8 separate laser and detector chips, for which each chip consists of a one-dimensional array of 12 devices. All the chips are assembled on a single substrate that consists of a printed circuit board or a ceramic MCM. Optical link channel efficiencies of greater than 90% and interchannel cross talk of less than -20 dB at low frequency have been measured. The system is compact at only 10 in.3 (25.4 cm3) and is scalable, as it can easily accommodate additional chips as well as two-dimensional optoelectronic device arrays for increased interconnection density.

© 1999 Optical Society of America

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    [CrossRef]
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    [CrossRef]
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    [CrossRef] [PubMed]
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    [CrossRef]
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    [CrossRef]
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    [CrossRef]
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1999 (2)

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

1998 (4)

1997 (3)

D. A. B. Miller, “Physical reasons for optical interconnection,” Int. J. Optoelectron. 11, 155–168 (1997).

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

1996 (2)

A. Krishnamoorthy, D. A. B. Miller, “Scaling opto-electronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. H. Lee, “Tolerancing of board-level free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

1995 (1)

1994 (2)

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1568 (1994).
[CrossRef]

1992 (1)

1991 (1)

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

1988 (1)

1987 (1)

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

1986 (1)

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

1985 (1)

1984 (1)

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Acciai, S.

Adema, G.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

Athale, R. A.

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Bergman, L. A.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Betzos, G. A.

Blerkom, D. A. V.

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

Bounnak, S.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Brenner, M. H.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Bristow, J.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Chirovsky, L. M. F.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Cunningham, J. E.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

D’Asaro, L. A.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Drabik, T. J.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Efron, U.

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

Esener, S.

G. Yayla, P. Marchand, S. Esener, “Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies,” Appl. Opt. 37, 205–227 (1998).
[CrossRef]

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for an optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

S. Esener, P. Marchand, “3D opto-electronic stacked processors: design and analysis,” in Optics in Computing 1998, P. Chavel, D. Miller, H. Thienpont, eds., Proc. SPIE3490, 541–545 (1998).

Esener, S. C.

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

C. Fan, B. Mansoorian, D. A. Van Blerkom, M. W. Hansen, V. H. Ozguz, S. C. Esener, G. C. Marsden, “Digital free-space optical interconnections: a comparison of transmitter technologies,” Appl. Opt. 34, 3103–3115 (1995).
[CrossRef] [PubMed]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Fan, C.

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

C. Fan, B. Mansoorian, D. A. Van Blerkom, M. W. Hansen, V. H. Ozguz, S. C. Esener, G. C. Marsden, “Digital free-space optical interconnections: a comparison of transmitter technologies,” Appl. Opt. 34, 3103–3115 (1995).
[CrossRef] [PubMed]

Feldman, M.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Feldman, M. R.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

Goodman, J. W.

R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectric chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
[CrossRef] [PubMed]

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Goosen, K. W.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Guest, C. C.

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Hansen, M. W.

Hesselink, L.

Hobson, W. S.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Hui, S. P.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Johnston, A. R.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Kiamilev, F.

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for an optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Kibar, O.

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

Kostuk, R. K.

Krishnamoorthy, A.

A. Krishnamoorthy, D. A. B. Miller, “Scaling opto-electronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Krishnamoorthy, A. V.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for an optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

Kung, S. C.

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Lee, S. H.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. H. Lee, “Tolerancing of board-level free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1568 (1994).
[CrossRef]

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Lehman, J.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Leibenguth, R. E.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Leonberger, F. J.

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Liu, Y.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Ma, J.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. H. Lee, “Tolerancing of board-level free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1568 (1994).
[CrossRef]

Magill, P.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

Mannoni, A.

Mansoorian, B.

Marchand, P.

G. Yayla, P. Marchand, S. Esener, “Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies,” Appl. Opt. 37, 205–227 (1998).
[CrossRef]

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for an optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

S. Esener, P. Marchand, “3D opto-electronic stacked processors: design and analysis,” in Optics in Computing 1998, P. Chavel, D. Miller, H. Thienpont, eds., Proc. SPIE3490, 541–545 (1998).

Marchand, P. J.

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

Marsden, G. C.

Marta, T.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

McCormick, F. B.

F. B. McCormick, “Free-space interconnection techniques,” in Photonics in Switching, J. E. Midwinter, ed. (Academic, New York, 1993), Vol. 2, pp. 169–250.

Miller, D. A. B.

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

D. A. B. Miller, “Physical reasons for optical interconnection,” Int. J. Optoelectron. 11, 155–168 (1997).

A. Krishnamoorthy, D. A. B. Miller, “Scaling opto-electronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

Mitkas, P. A.

Morgan, R. A.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Morris, J. E.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

Neilson, D. T.

Nixon, R.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Nohava, J.

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

Ozguz, V.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. H. Lee, “Tolerancing of board-level free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1568 (1994).
[CrossRef]

Ozguz, V. H.

Patra, S.

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. H. Lee, “Tolerancing of board-level free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1568 (1994).
[CrossRef]

Quercioli, F.

Raja, A.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

Schenfeld, E.

Tiribilli, B.

Tseng, B. J.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Turlik, I.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

Urquhart, K. S.

Van Blerkom, D. A.

Walker, J. A.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Wu, W. H.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Wynn, J. D.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Yasin, M.

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

Yayla, G.

Yayla, G. I.

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

Yu, P.

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

Yu, P. K. L.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

Zaleta, D.

Zydzik, G. J.

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

Appl. Opt. (9)

R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectric chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
[CrossRef] [PubMed]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, S. Esener, “Grain-size consideration for an optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

D. T. Neilson, E. Schenfeld, “Plastic modules for free-space optical interconnects,” Appl. Opt. 37, 2944–2952 (1998).
[CrossRef]

F. Quercioli, B. Tiribilli, A. Mannoni, S. Acciai, “Optomechanics with LEGO,” Appl. Opt. 37, 3408–3416 (1998).
[CrossRef]

C. Fan, B. Mansoorian, D. A. Van Blerkom, M. W. Hansen, V. H. Ozguz, S. C. Esener, G. C. Marsden, “Digital free-space optical interconnections: a comparison of transmitter technologies,” Appl. Opt. 34, 3103–3115 (1995).
[CrossRef] [PubMed]

D. Zaleta, S. Patra, V. Ozguz, J. Ma, S. H. Lee, “Tolerancing of board-level free-space optical interconnects,” Appl. Opt. 35, 1317–1327 (1996).
[CrossRef] [PubMed]

G. Yayla, P. Marchand, S. Esener, “Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies,” Appl. Opt. 37, 205–227 (1998).
[CrossRef]

G. A. Betzos, P. A. Mitkas, “Performance evaluation of massively parallel processing architectures with three-dimensional optical interconnections,” Appl. Opt. 37, 315–325 (1998).
[CrossRef]

IEEE J. Lightwave Technol. (2)

F. Kiamilev, P. Marchand, A. Krishnamoorthy, S. Esener, S. H. Lee, “Performance comparison between opto-electronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

O. Kibar, D. A. V. Blerkom, C. Fan, P. J. Marchand, S. C. Esener, “Power minimization and technology comparisons for digital free-space optoelectronic interconnections,” IEEE J. Lightwave Technol. 17, 546–555 (1999).
[CrossRef]

IEEE J. Sel. Top. Quantum Optoelectron. (1)

A. Krishnamoorthy, D. A. B. Miller, “Scaling opto-electronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55–76 (1996).
[CrossRef]

IEEE Photon. Technol. Lett. (1)

A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999).
[CrossRef]

IEEE Trans. Components Packag. Manuf. Technol. B (1)

M. R. Feldman, J. E. Morris, I. Turlik, P. Magill, G. Adema, M. Yasin, A. Raja, “Holographic optical interconnects for VLSI multichip modules,” IEEE Trans. Components Packag. Manuf. Technol. B 17, 223–227 (1994).
[CrossRef]

IEEE Trans. Electron Devices (1)

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices 34, 706–714 (1987).
[CrossRef]

Int. J. Optoelectron. (1)

D. A. B. Miller, “Physical reasons for optical interconnection,” Int. J. Optoelectron. 11, 155–168 (1997).

J. Parallel Distrib. Comput. (2)

A. V. Krishnamoorthy, D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109–114 (1997).
[CrossRef]

P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Esener, U. Efron, “Optically augmented 3-D computer: system technology and architecture,” J. Parallel Distrib. Comput. 41, 20–35 (1997).
[CrossRef]

Opt. Eng. (2)

L. A. Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109–1118 (1986).
[CrossRef]

S. Patra, J. Ma, V. Ozguz, S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561–1568 (1994).
[CrossRef]

Proc. IEEE (1)

J. W. Goodman, F. J. Leonberger, S. C. Kung, R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866 (1984).
[CrossRef]

Other (5)

F. B. McCormick, “Free-space interconnection techniques,” in Photonics in Switching, J. E. Midwinter, ed. (Academic, New York, 1993), Vol. 2, pp. 169–250.

ARMA Design, Inc., 7887 Dunbrook Road, Suite A, San Diego, Calif. 92126.

Optical Research Associates, 3280 East Foothill Boulevard, Suite 300, Pasadena, Calif. 91107.

S. Esener, P. Marchand, “3D opto-electronic stacked processors: design and analysis,” in Optics in Computing 1998, P. Chavel, D. Miller, H. Thienpont, eds., Proc. SPIE3490, 541–545 (1998).

R. A. Morgan, J. Bristow, M. H. Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc. SPIE2811, 232–242 (1996).
[CrossRef]

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Figures (12)

Fig. 1
Fig. 1

System schematic: One-dimensional OE chips are connected optically by a vertical system. All the VCSEL arrays are connected optically to their corresponding detector arrays (one to one, diagonally). Data can be fed electrically to the silicon chips and passed on to the VCSEL’s to implement either single-stage or multistage interconnects. Data can also be read out electrically from each chip independently.

Fig. 2
Fig. 2

MCM comprising three layers: (a) the lens-registration board, (b) the chip-registration board, (c) the baseboard (PCB). Fiducial pins and pinholes are used to register all the boards. (d) The MCM after assembly. IC, integrated circuit.

Fig. 3
Fig. 3

(a) Optical system configuration achieved by use of only commercially available devices. (b) Code V view of the optics. The point-spread function shows that 99% of the energy will be encircled in a 17-µm spot.

Fig. 4
Fig. 4

Chip-transfer sequence: Top: The VCSEL and the detector chips are attached to a temporary transparent mask. Middle: The temporary substrate is aligned with a cavity composed of the baseboard and the chip-registration board (or ring). Bottom: All the OE chips are released from the temporary substrate while they are die attached to the PCB carrier.

Fig. 5
Fig. 5

Lens assembly: (a) Optical setup for the lens-module assembly. (b) Schematic view of the lens module with two lenses on a transparent substrate.

Fig. 6
Fig. 6

Experimental system after assembly: (a) An OE MCM with a lens module is mounted on a PCB test board. (b) The cage-assembly technique that can be used for mirror packaging.

Fig. 7
Fig. 7

Single-channel configuration: The bottom surface of the glass substrate is used as a reference plane to address the misalignment of each element in the system.

Fig. 8
Fig. 8

Simulated spot size at the detector plane (the point-spread function in Code V). More than 90% of the energy will be encircled in a spot smaller than 20 µm.

Fig. 9
Fig. 9

System performance at different frequencies: (a) The detector output at 10 kHz (upper curve) and the VCSEL’s driving signal (lower curve). (b) The detector output at 2.5 MHz.

Fig. 10
Fig. 10

VCSEL and detector characterization and comparison with expected results: (a) L–I curve of one VCSEL and (b) detector responsivity.

Fig. 11
Fig. 11

Cross-talk measurement: (a) The signal from the on channel. (b) Upper curve: The -20-dB cross-talk signal from the neighboring channel. Lower curve: The VCSEL’s driving signal.

Fig. 12
Fig. 12

Top-mirror tolerance curves: (a) the lateral x tolerance, (b) the lateral y tolerance, (c) the vertical z tolerance, (d) the tilt tolerance in the YOZ plane, (e) the tilt tolerance in the XOZ plane. For a 10% loss the system exhibits a ±30-µm lateral tolerance, a ±350-µm vertical tolerance, and a ±3-arc min tilt tolerance.

Tables (2)

Tables Icon

Table 1 Typical Misalignment Values for Each Device and Component in the System

Tables Icon

Table 2 Lateral Spot Shift in the Image Plane with Wavelengtha

Equations (1)

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