Abstract

We present a method for automating the creation of complementary-metal-oxide-semiconductor (CMOS) integrated circuits that successfully utilizes a large number of area-distributed pads for input–output communication. This method uses Duet Technologies’ epoch computer-aided-design tool for automated placement and routing of CMOS circuitry, given a schematic netlist as an input. The novelty of this approach is that it uses Duet Technologies’ eggo program to place and route area-pad signals. To verify this methodology, it is applied to the design of a digital signal-processing circuit, with 200 optical area-pad input–outputs and 44 perimeter-pad input–outputs, that is being fabricated with Bell Labs 1997 CMOS–multiple-quantum-well foundry. The layout results are as good as or better than the results obtained by manual layout.

© 1998 Optical Society of America

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