Abstract

Highly-efficient two-step recoded and one-step nonrecoded trinary signed-digit (TSD) carry-free adders–subtracters are presented on the basis of redundant-bit representation for the operands’ digits. It has been shown that only 24 (30) minterms are needed to implement the two-step recoded (the one-step nonrecoded) TSD addition for any operand length. Optical implementation of the proposed arithmetic can be carried out by use of correlation- or matrix-multiplication-based schemes, saving 50% of the system memory. Furthermore, we present four different multiplication designs based on our proposed recoded and nonrecoded TSD adders. Our multiplication designs require a small number of reduced minterms to generate the multiplication partial products. Finally, a recently proposed pipelined iterative-tree algorithm can be used in the TSD adders–multipliers; consequently, efficient use of all available adders can be made.

© 1998 Optical Society of America

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    [CrossRef]
  2. N. S. Szabo, R. T. Tanaka, Residue Arithmetic and Its Applications to Computer Technology (McGraw-Hill, New York, 1967).
  3. D. Psaltis, D. Casasent, “Optical residue arithmetic: a correlator approach,” Appl. Opt. 18, 163–171 (1979).
    [CrossRef] [PubMed]
  4. A. Hwang, Y. Tsunida, J. W. Goodman, S. Ishihara, “Optical computation using residue arithmetic,” Appl. Opt. 18, 149–162 (1979).
    [CrossRef]
  5. K. Hwang, A. Louri, “Optical multiplication and division using modified signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).
    [CrossRef]
  6. M. M. Mirsalehi, T. K. Gaylord, “Logical minimization of multilevel coded functions,” Appl. Opt. 25, 3078–3088 (1986).
    [CrossRef] [PubMed]
  7. M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, “Symmetrically recoded quaternary signed-digit arithmetic using a shared content-addressable memory,” Opt. Eng. 35, 1141–1149 (1996).
    [CrossRef]
  8. T. K. Gaylord, M. M. Mirsalehi, “Truth-table look-up processing: number representation, multilevel coding, and logical minimization,” Opt. Eng. 25, 22–33 (1986).
    [CrossRef]
  9. M. S. Alam, “Parallel optical computing using recoded trinary signed-digit numbers,” Appl. Opt. 33, 4392–4397 (1994).
    [CrossRef] [PubMed]
  10. A. Avizienis, “Signed-digit number representations for fast parallel arithmetic,” IRE Trans. Electron. Comput. EC-10(3), 389–400 (1961).
  11. A. K. Cherri, M. A. Karim, “Modified signed digit arithmetic using an efficient symbolic substitution,” Appl. Opt. 27, 3824–3827 (1988).
    [CrossRef] [PubMed]
  12. R. P. Bocker, B. L. Drake, M. E. Lasher, T. B. Henderson, “Modified signed-digit addition and subtraction using optical symbolic substitution,” Appl. Opt. 25, 2456–2457 (1986).
    [CrossRef] [PubMed]
  13. A. A. S. Awwal, M. N. Islam, M. A. Karim, “Modified signed-digit trinary arithmetic by using symbolic substitution,” Appl. Opt. 31, 1687–1694 (1994).
    [CrossRef]
  14. A. A. S. Awwal, “Recoded signed-digit binary addition–subtraction using opto-electronic symbolic substitution,” Appl. Opt. 31, 3205–3208 (1992).
    [CrossRef] [PubMed]
  15. A. K. Cherri, “Symmetrically recoded modified signed-digit optical addition and subtraction,” Appl. Opt. 33, 4378–4382 (1994).
    [CrossRef] [PubMed]
  16. Y. Li, G. Eichmann, “Conditional symbolic modified-signed-digit arithmetic using optical content-addressable memory logic elements,” Appl. Opt. 26, 2328–2333 (1987).
    [CrossRef] [PubMed]
  17. K. Hwang, D. K. Panda, “High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations,” Opt. Eng. 31, 2422–2433 (1992).
    [CrossRef]
  18. A. K. Cherri, N. I. Khachab, “Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution,” Opt. Laser Technol. 28, 397–403 (1996).
    [CrossRef]
  19. G. A. De Biase, A. Massini, “High efficiency redundant binary number representations for parallel arithmetic on optical computers,” Opt. Laser Technol. 26, 219–224 (1994).
    [CrossRef]
  20. M. S. Alam, M. A. Karim, A. A. S. Awwal, J. J. Westerkamp, “Optical processing based on conditonal higher-order trinary modified signed-digit symbolic substitution,” Appl. Opt. 31, 5614–5621 (1992).
    [CrossRef] [PubMed]
  21. R. Arrathoon, S. P. Kozaitis, “Shadow casting for multiple-valued associated logic,” Opt. Eng. 25, 29–37 (1986).
    [CrossRef]
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    [CrossRef]
  23. K. H. Brenner, A. Huang, N. Streibel, “Digital optical computing with symbolic substitution,” Appl. Opt. 25, 3054–3060 (1986).
    [CrossRef] [PubMed]
  24. B. Ha, Y. Li, “Parallel modified signed-digit arithmetic using an optoelectronic shared content-addressable-memory processor,” Appl. Opt. 33, 3647–3662 (1994).
    [CrossRef] [PubMed]
  25. Y. Li, D. H. Kim, A. Kostrzewski, G. Eichmann, “Content-addressable-memory-based single-stage optical modified-signed-digit arithmetic,” Opt. Lett. 14, 1254–1256 (1989).
    [CrossRef] [PubMed]
  26. S. Barua, “Single-stage optical adder/subtracter,” Opt. Eng. 30, 265–270 (1991).
    [CrossRef]
  27. H. Huang, M. Itoh, T. Yatagai, “Modified signed-digit arithmetic based on redundant bit representation,” Appl. Opt. 33, 6146–6156 (1994).
    [CrossRef] [PubMed]
  28. D. P. Casasent, P. Woodford, “Symbolic substitution modified signed-digit optical adder,” Appl. Opt. 33, 1498–1506 (1994).
    [CrossRef] [PubMed]
  29. K. Al-Ghoneim, D. P. Casasent, “High-accuracy pipelined iterative-tree optical multiplication,” Appl. Opt. 33, 1517–1527 (1994).
    [CrossRef] [PubMed]
  30. V. Chandran, T. F. Krile, J. F. Walkup, “Optical techniques for real-time binary multiplication,” Appl. Opt. 25, 2272–2276 (1986).
    [CrossRef] [PubMed]
  31. Y. Li, B. Ha, J. G. Eichmann, “Fast digital optical multiplication using an array of binary symmetric logic counters,” Appl. Opt. 30, 531–539 (1991).
    [CrossRef] [PubMed]
  32. S. Barua, “High-speed multiplier for digital signal processing,” Opt. Eng. 30, 1997–2002 (1991).
    [CrossRef]
  33. H. Huang, L. Liu, Z. Wang, “Parallel multiple matrix multiplication using an orthogonal shadow-casting and imaging system,” Opt. Lett. 15, 1085–1087 (1990).
    [CrossRef] [PubMed]
  34. L. Liu, G. Li, Y. Yin, “Optical complex matrix–vector multiplication with negative binary inner products,” Opt. Lett. 19, 1085–1087 (1994).
    [CrossRef]
  35. F. Li, M. Morisue, “A novel Josephson adder without carry propagation delay,” IEEE Trans. Appl. Superconduct. 3, 2683–2686 (1993).
    [CrossRef]
  36. T. Stouraitis, C. Chen, “Hybrid signed-digit logarithmic number system processor,” IEE Proc. E 140, 205–210 (1993).
  37. W. Balakrishnan, N. Burgess, “Very-high-speed VLSI 2s-complement multiplier using signed binary digits,” IEE Proc. Comput. Digit. Technol. 71, 29–34 (1994).
  38. N. Takagi, S. Yajima, “Modular multiplication hardware algorithms with redundant representation and their application to RSA cryptosystem,” IEEE Trans. Comput. 41, 887–891 (1992).
    [CrossRef]
  39. P. Srinivasan, F. E. Petry, “Constant-division algorithms,” IEE Proc. Comput. Digit. Technol. 141, 334–340 (1994).
    [CrossRef]
  40. N. Burgess, “Radix-2 SRT division algorithm with simple quotient digit selection,” Electron. Lett. 27, 1910–1911 (1991).
    [CrossRef]
  41. M. M. Hossain, J. U. Ahmed, A. A. S. Awwal, “Efficient electronic implementation of modified signed digit trinary carry free adder,” Proc. IEEE 1, 185–189 (1993).
  42. J. U. Ahmed, A. A. S. Awwal, “Multiplier design using RBSD number system,” Proc. IEEE 1, 180–184 (1993).
  43. K. H. Brenner, A. Huang, “Optical implementations of the perfect shuffle interconnections,” Appl. Opt. 27, 135–137 (1988).
    [CrossRef] [PubMed]
  44. M. S. Alam, M. A. Karim, “Programmable optical perfect shuffle interconnection network using Fredkin gates,” Microwave Opt. Technol. Lett. 5, 330–333 (1992).
    [CrossRef]

1996

M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, “Symmetrically recoded quaternary signed-digit arithmetic using a shared content-addressable memory,” Opt. Eng. 35, 1141–1149 (1996).
[CrossRef]

A. K. Cherri, N. I. Khachab, “Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution,” Opt. Laser Technol. 28, 397–403 (1996).
[CrossRef]

1994

G. A. De Biase, A. Massini, “High efficiency redundant binary number representations for parallel arithmetic on optical computers,” Opt. Laser Technol. 26, 219–224 (1994).
[CrossRef]

W. Balakrishnan, N. Burgess, “Very-high-speed VLSI 2s-complement multiplier using signed binary digits,” IEE Proc. Comput. Digit. Technol. 71, 29–34 (1994).

P. Srinivasan, F. E. Petry, “Constant-division algorithms,” IEE Proc. Comput. Digit. Technol. 141, 334–340 (1994).
[CrossRef]

L. Liu, G. Li, Y. Yin, “Optical complex matrix–vector multiplication with negative binary inner products,” Opt. Lett. 19, 1085–1087 (1994).
[CrossRef]

D. P. Casasent, P. Woodford, “Symbolic substitution modified signed-digit optical adder,” Appl. Opt. 33, 1498–1506 (1994).
[CrossRef] [PubMed]

K. Al-Ghoneim, D. P. Casasent, “High-accuracy pipelined iterative-tree optical multiplication,” Appl. Opt. 33, 1517–1527 (1994).
[CrossRef] [PubMed]

B. Ha, Y. Li, “Parallel modified signed-digit arithmetic using an optoelectronic shared content-addressable-memory processor,” Appl. Opt. 33, 3647–3662 (1994).
[CrossRef] [PubMed]

A. K. Cherri, “Symmetrically recoded modified signed-digit optical addition and subtraction,” Appl. Opt. 33, 4378–4382 (1994).
[CrossRef] [PubMed]

M. S. Alam, “Parallel optical computing using recoded trinary signed-digit numbers,” Appl. Opt. 33, 4392–4397 (1994).
[CrossRef] [PubMed]

H. Huang, M. Itoh, T. Yatagai, “Modified signed-digit arithmetic based on redundant bit representation,” Appl. Opt. 33, 6146–6156 (1994).
[CrossRef] [PubMed]

A. A. S. Awwal, M. N. Islam, M. A. Karim, “Modified signed-digit trinary arithmetic by using symbolic substitution,” Appl. Opt. 31, 1687–1694 (1994).
[CrossRef]

1993

M. M. Hossain, J. U. Ahmed, A. A. S. Awwal, “Efficient electronic implementation of modified signed digit trinary carry free adder,” Proc. IEEE 1, 185–189 (1993).

J. U. Ahmed, A. A. S. Awwal, “Multiplier design using RBSD number system,” Proc. IEEE 1, 180–184 (1993).

F. Li, M. Morisue, “A novel Josephson adder without carry propagation delay,” IEEE Trans. Appl. Superconduct. 3, 2683–2686 (1993).
[CrossRef]

T. Stouraitis, C. Chen, “Hybrid signed-digit logarithmic number system processor,” IEE Proc. E 140, 205–210 (1993).

1992

N. Takagi, S. Yajima, “Modular multiplication hardware algorithms with redundant representation and their application to RSA cryptosystem,” IEEE Trans. Comput. 41, 887–891 (1992).
[CrossRef]

K. Hwang, D. K. Panda, “High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations,” Opt. Eng. 31, 2422–2433 (1992).
[CrossRef]

A. A. S. Awwal, “Recoded signed-digit binary addition–subtraction using opto-electronic symbolic substitution,” Appl. Opt. 31, 3205–3208 (1992).
[CrossRef] [PubMed]

M. S. Alam, M. A. Karim, “Programmable optical perfect shuffle interconnection network using Fredkin gates,” Microwave Opt. Technol. Lett. 5, 330–333 (1992).
[CrossRef]

M. S. Alam, M. A. Karim, A. A. S. Awwal, J. J. Westerkamp, “Optical processing based on conditonal higher-order trinary modified signed-digit symbolic substitution,” Appl. Opt. 31, 5614–5621 (1992).
[CrossRef] [PubMed]

1991

Y. Li, B. Ha, J. G. Eichmann, “Fast digital optical multiplication using an array of binary symmetric logic counters,” Appl. Opt. 30, 531–539 (1991).
[CrossRef] [PubMed]

S. Barua, “Single-stage optical adder/subtracter,” Opt. Eng. 30, 265–270 (1991).
[CrossRef]

S. Barua, “High-speed multiplier for digital signal processing,” Opt. Eng. 30, 1997–2002 (1991).
[CrossRef]

N. Burgess, “Radix-2 SRT division algorithm with simple quotient digit selection,” Electron. Lett. 27, 1910–1911 (1991).
[CrossRef]

1990

1989

Y. Li, D. H. Kim, A. Kostrzewski, G. Eichmann, “Content-addressable-memory-based single-stage optical modified-signed-digit arithmetic,” Opt. Lett. 14, 1254–1256 (1989).
[CrossRef] [PubMed]

K. Hwang, A. Louri, “Optical multiplication and division using modified signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).
[CrossRef]

1988

1987

1986

1979

1961

A. Avizienis, “Signed-digit number representations for fast parallel arithmetic,” IRE Trans. Electron. Comput. EC-10(3), 389–400 (1961).

Ahmed, J. U.

M. M. Hossain, J. U. Ahmed, A. A. S. Awwal, “Efficient electronic implementation of modified signed digit trinary carry free adder,” Proc. IEEE 1, 185–189 (1993).

J. U. Ahmed, A. A. S. Awwal, “Multiplier design using RBSD number system,” Proc. IEEE 1, 180–184 (1993).

Ahuja, Y.

M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, “Symmetrically recoded quaternary signed-digit arithmetic using a shared content-addressable memory,” Opt. Eng. 35, 1141–1149 (1996).
[CrossRef]

Alam, M. S.

M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, “Symmetrically recoded quaternary signed-digit arithmetic using a shared content-addressable memory,” Opt. Eng. 35, 1141–1149 (1996).
[CrossRef]

M. S. Alam, “Parallel optical computing using recoded trinary signed-digit numbers,” Appl. Opt. 33, 4392–4397 (1994).
[CrossRef] [PubMed]

M. S. Alam, M. A. Karim, “Programmable optical perfect shuffle interconnection network using Fredkin gates,” Microwave Opt. Technol. Lett. 5, 330–333 (1992).
[CrossRef]

M. S. Alam, M. A. Karim, A. A. S. Awwal, J. J. Westerkamp, “Optical processing based on conditonal higher-order trinary modified signed-digit symbolic substitution,” Appl. Opt. 31, 5614–5621 (1992).
[CrossRef] [PubMed]

Al-Ghoneim, K.

Arrathoon, R.

R. Arrathoon, S. P. Kozaitis, “Shadow casting for multiple-valued associated logic,” Opt. Eng. 25, 29–37 (1986).
[CrossRef]

Avizienis, A.

A. Avizienis, “Signed-digit number representations for fast parallel arithmetic,” IRE Trans. Electron. Comput. EC-10(3), 389–400 (1961).

Awwal, A. A. S.

Balakrishnan, W.

W. Balakrishnan, N. Burgess, “Very-high-speed VLSI 2s-complement multiplier using signed binary digits,” IEE Proc. Comput. Digit. Technol. 71, 29–34 (1994).

Barua, S.

S. Barua, “Single-stage optical adder/subtracter,” Opt. Eng. 30, 265–270 (1991).
[CrossRef]

S. Barua, “High-speed multiplier for digital signal processing,” Opt. Eng. 30, 1997–2002 (1991).
[CrossRef]

Bocker, R. P.

Brenner, K. H.

Burgess, N.

W. Balakrishnan, N. Burgess, “Very-high-speed VLSI 2s-complement multiplier using signed binary digits,” IEE Proc. Comput. Digit. Technol. 71, 29–34 (1994).

N. Burgess, “Radix-2 SRT division algorithm with simple quotient digit selection,” Electron. Lett. 27, 1910–1911 (1991).
[CrossRef]

Casasent, D.

Casasent, D. P.

Chandran, V.

Chatterjea, A.

M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, “Symmetrically recoded quaternary signed-digit arithmetic using a shared content-addressable memory,” Opt. Eng. 35, 1141–1149 (1996).
[CrossRef]

Chen, C.

T. Stouraitis, C. Chen, “Hybrid signed-digit logarithmic number system processor,” IEE Proc. E 140, 205–210 (1993).

Cherri, A. K.

M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, “Symmetrically recoded quaternary signed-digit arithmetic using a shared content-addressable memory,” Opt. Eng. 35, 1141–1149 (1996).
[CrossRef]

A. K. Cherri, N. I. Khachab, “Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution,” Opt. Laser Technol. 28, 397–403 (1996).
[CrossRef]

A. K. Cherri, “Symmetrically recoded modified signed-digit optical addition and subtraction,” Appl. Opt. 33, 4378–4382 (1994).
[CrossRef] [PubMed]

A. K. Cherri, M. A. Karim, “Modified signed digit arithmetic using an efficient symbolic substitution,” Appl. Opt. 27, 3824–3827 (1988).
[CrossRef] [PubMed]

De Biase, G. A.

G. A. De Biase, A. Massini, “High efficiency redundant binary number representations for parallel arithmetic on optical computers,” Opt. Laser Technol. 26, 219–224 (1994).
[CrossRef]

Drake, B. L.

Eichmann, G.

Eichmann, J. G.

Gaylord, T. K.

M. M. Mirsalehi, T. K. Gaylord, “Logical minimization of multilevel coded functions,” Appl. Opt. 25, 3078–3088 (1986).
[CrossRef] [PubMed]

T. K. Gaylord, M. M. Mirsalehi, “Truth-table look-up processing: number representation, multilevel coding, and logical minimization,” Opt. Eng. 25, 22–33 (1986).
[CrossRef]

Goodman, J. W.

Ha, B.

Henderson, T. B.

Hossain, M. M.

M. M. Hossain, J. U. Ahmed, A. A. S. Awwal, “Efficient electronic implementation of modified signed digit trinary carry free adder,” Proc. IEEE 1, 185–189 (1993).

Huang, A.

K. H. Brenner, A. Huang, “Optical implementations of the perfect shuffle interconnections,” Appl. Opt. 27, 135–137 (1988).
[CrossRef] [PubMed]

K. H. Brenner, A. Huang, N. Streibel, “Digital optical computing with symbolic substitution,” Appl. Opt. 25, 3054–3060 (1986).
[CrossRef] [PubMed]

A. Huang, “Parallel algorithms for optical digital computers,” in Proceedings, Tenth International Optical Computing Conference, S. Horvitz, ed. (IEEE Computer Society and International Optical Conference, New York, 1983), pp. 13–17.
[CrossRef]

Huang, H.

Hurst, S. L.

S. L. Hurst, “Multiple-valued threshold logic: its status and its realization,” Opt. Eng. 25, 44–53 (1986).
[CrossRef]

Hwang, A.

Hwang, K.

K. Hwang, D. K. Panda, “High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations,” Opt. Eng. 31, 2422–2433 (1992).
[CrossRef]

K. Hwang, A. Louri, “Optical multiplication and division using modified signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).
[CrossRef]

Ishihara, S.

Islam, M. N.

Itoh, M.

Karim, M. A.

Khachab, N. I.

A. K. Cherri, N. I. Khachab, “Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution,” Opt. Laser Technol. 28, 397–403 (1996).
[CrossRef]

Kim, D. H.

Kostrzewski, A.

Kozaitis, S. P.

R. Arrathoon, S. P. Kozaitis, “Shadow casting for multiple-valued associated logic,” Opt. Eng. 25, 29–37 (1986).
[CrossRef]

Krile, T. F.

Lasher, M. E.

Li, F.

F. Li, M. Morisue, “A novel Josephson adder without carry propagation delay,” IEEE Trans. Appl. Superconduct. 3, 2683–2686 (1993).
[CrossRef]

Li, G.

Li, Y.

Liu, L.

Louri, A.

K. Hwang, A. Louri, “Optical multiplication and division using modified signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).
[CrossRef]

Massini, A.

G. A. De Biase, A. Massini, “High efficiency redundant binary number representations for parallel arithmetic on optical computers,” Opt. Laser Technol. 26, 219–224 (1994).
[CrossRef]

Mirsalehi, M. M.

T. K. Gaylord, M. M. Mirsalehi, “Truth-table look-up processing: number representation, multilevel coding, and logical minimization,” Opt. Eng. 25, 22–33 (1986).
[CrossRef]

M. M. Mirsalehi, T. K. Gaylord, “Logical minimization of multilevel coded functions,” Appl. Opt. 25, 3078–3088 (1986).
[CrossRef] [PubMed]

Morisue, M.

F. Li, M. Morisue, “A novel Josephson adder without carry propagation delay,” IEEE Trans. Appl. Superconduct. 3, 2683–2686 (1993).
[CrossRef]

Panda, D. K.

K. Hwang, D. K. Panda, “High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations,” Opt. Eng. 31, 2422–2433 (1992).
[CrossRef]

Petry, F. E.

P. Srinivasan, F. E. Petry, “Constant-division algorithms,” IEE Proc. Comput. Digit. Technol. 141, 334–340 (1994).
[CrossRef]

Psaltis, D.

Srinivasan, P.

P. Srinivasan, F. E. Petry, “Constant-division algorithms,” IEE Proc. Comput. Digit. Technol. 141, 334–340 (1994).
[CrossRef]

Stouraitis, T.

T. Stouraitis, C. Chen, “Hybrid signed-digit logarithmic number system processor,” IEE Proc. E 140, 205–210 (1993).

Streibel, N.

Szabo, N. S.

N. S. Szabo, R. T. Tanaka, Residue Arithmetic and Its Applications to Computer Technology (McGraw-Hill, New York, 1967).

Takagi, N.

N. Takagi, S. Yajima, “Modular multiplication hardware algorithms with redundant representation and their application to RSA cryptosystem,” IEEE Trans. Comput. 41, 887–891 (1992).
[CrossRef]

Tanaka, R. T.

N. S. Szabo, R. T. Tanaka, Residue Arithmetic and Its Applications to Computer Technology (McGraw-Hill, New York, 1967).

Tsunida, Y.

Walkup, J. F.

Wang, Z.

Westerkamp, J. J.

Woodford, P.

Yajima, S.

N. Takagi, S. Yajima, “Modular multiplication hardware algorithms with redundant representation and their application to RSA cryptosystem,” IEEE Trans. Comput. 41, 887–891 (1992).
[CrossRef]

Yatagai, T.

Yin, Y.

Appl. Opt.

A. Hwang, Y. Tsunida, J. W. Goodman, S. Ishihara, “Optical computation using residue arithmetic,” Appl. Opt. 18, 149–162 (1979).
[CrossRef]

D. Psaltis, D. Casasent, “Optical residue arithmetic: a correlator approach,” Appl. Opt. 18, 163–171 (1979).
[CrossRef] [PubMed]

V. Chandran, T. F. Krile, J. F. Walkup, “Optical techniques for real-time binary multiplication,” Appl. Opt. 25, 2272–2276 (1986).
[CrossRef] [PubMed]

R. P. Bocker, B. L. Drake, M. E. Lasher, T. B. Henderson, “Modified signed-digit addition and subtraction using optical symbolic substitution,” Appl. Opt. 25, 2456–2457 (1986).
[CrossRef] [PubMed]

K. H. Brenner, A. Huang, N. Streibel, “Digital optical computing with symbolic substitution,” Appl. Opt. 25, 3054–3060 (1986).
[CrossRef] [PubMed]

M. M. Mirsalehi, T. K. Gaylord, “Logical minimization of multilevel coded functions,” Appl. Opt. 25, 3078–3088 (1986).
[CrossRef] [PubMed]

Y. Li, G. Eichmann, “Conditional symbolic modified-signed-digit arithmetic using optical content-addressable memory logic elements,” Appl. Opt. 26, 2328–2333 (1987).
[CrossRef] [PubMed]

K. H. Brenner, A. Huang, “Optical implementations of the perfect shuffle interconnections,” Appl. Opt. 27, 135–137 (1988).
[CrossRef] [PubMed]

A. K. Cherri, M. A. Karim, “Modified signed digit arithmetic using an efficient symbolic substitution,” Appl. Opt. 27, 3824–3827 (1988).
[CrossRef] [PubMed]

Y. Li, B. Ha, J. G. Eichmann, “Fast digital optical multiplication using an array of binary symmetric logic counters,” Appl. Opt. 30, 531–539 (1991).
[CrossRef] [PubMed]

A. A. S. Awwal, M. N. Islam, M. A. Karim, “Modified signed-digit trinary arithmetic by using symbolic substitution,” Appl. Opt. 31, 1687–1694 (1994).
[CrossRef]

M. S. Alam, M. A. Karim, A. A. S. Awwal, J. J. Westerkamp, “Optical processing based on conditonal higher-order trinary modified signed-digit symbolic substitution,” Appl. Opt. 31, 5614–5621 (1992).
[CrossRef] [PubMed]

D. P. Casasent, P. Woodford, “Symbolic substitution modified signed-digit optical adder,” Appl. Opt. 33, 1498–1506 (1994).
[CrossRef] [PubMed]

K. Al-Ghoneim, D. P. Casasent, “High-accuracy pipelined iterative-tree optical multiplication,” Appl. Opt. 33, 1517–1527 (1994).
[CrossRef] [PubMed]

B. Ha, Y. Li, “Parallel modified signed-digit arithmetic using an optoelectronic shared content-addressable-memory processor,” Appl. Opt. 33, 3647–3662 (1994).
[CrossRef] [PubMed]

A. K. Cherri, “Symmetrically recoded modified signed-digit optical addition and subtraction,” Appl. Opt. 33, 4378–4382 (1994).
[CrossRef] [PubMed]

M. S. Alam, “Parallel optical computing using recoded trinary signed-digit numbers,” Appl. Opt. 33, 4392–4397 (1994).
[CrossRef] [PubMed]

H. Huang, M. Itoh, T. Yatagai, “Modified signed-digit arithmetic based on redundant bit representation,” Appl. Opt. 33, 6146–6156 (1994).
[CrossRef] [PubMed]

A. A. S. Awwal, “Recoded signed-digit binary addition–subtraction using opto-electronic symbolic substitution,” Appl. Opt. 31, 3205–3208 (1992).
[CrossRef] [PubMed]

Electron. Lett.

N. Burgess, “Radix-2 SRT division algorithm with simple quotient digit selection,” Electron. Lett. 27, 1910–1911 (1991).
[CrossRef]

IEE Proc. Comput. Digit. Technol.

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Figures (7)

Fig. 1
Fig. 1

Diagram of a two-step TSD adder-subtractor in which the functional block A (B) employs the 25 (9) computation rules given in Table 1 (2).

Fig. 2
Fig. 2

Optical spatial encoding for (a) the prime and (b) the fuzzy TSD numbers given in Table 7.

Fig. 3
Fig. 3

Matrix-multiplication optoelectronics implementation of the TSD adder schemes.

Fig. 4
Fig. 4

Input TSD’s and the encoding of the 30 minterms for optical matrix-multiplication schemes: (a) Column-order arrangement for encoding a minterm. (b) Encoded minterms mask the production of output digits 1 and 2 for TSD addition. (c) Encoded minterms mask the production of output digits 1̅ and 2̅ for TSD subtraction.

Fig. 5
Fig. 5

Two 5-digit multiplications.

Fig. 6
Fig. 6

Example of recoded TSD multiplication showing the sequence of recoding and addition.

Fig. 7
Fig. 7

Four-digit nonrecoded TSD multiplication: p and c are the partial product and the carry, respectively.

Tables (19)

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Table 1 Truth Table for TSD Addition: First-Step Rules

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Table 2 Truth Table for TSD Addition: Second-Step Rules

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Table 3 Truth Table for Second-Step TSD Subtraction: Intermediate Difference and Borrow

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Table 4 Truth Table for Recoding TSD Numbers

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Table 5 Truth Table for Recoded TSD Addition

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Table 6 Truth Table for One-Step Nonrecoded TSD Addition

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Table 7 Five-for-One RBR Coding for the Prime and the Fuzzy TSD Digits

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Table 8 Reduced Minterms for the Recoding TSD Algorithm Based on RBR Coding

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Table 9 Reduced Minterms for the Addition of Recoded TSD Numbers Based on RBR Coding

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Table 10 Reduced Minterms for One-Step Nonrecoded TSD Addition Based on RBR Coding

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Table 11 Truth Table for Recoded TSD Multiplication

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Table 12 Reduced Minterms for Generating Partial Products when Both the Multiplicand and the Multiplier are Recoded

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Table 13 Truth Table for TSD Multiplication when Only the Multiplier is Recoded

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Table 14 Reduced Minterms for Generating Partial Products when Only the Multiplier is Recoded

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Table 15 Truth Table for the Nonrecoded TSD Multiplication with Carries

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Table 16 Reduced Minterms for Generating Partial-Product and Partial-Carry Digits for Nonrecoded TSD Multiplication

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Table 17 Truth Table for Nonrecoded TSD Multiplication without Carries

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Table 18 Reduced Minterms for Generating Partial Products without Carries for Nonrecoded TSD Multiplication

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Table 19 Comparison of the Four Multiplication Designs

Equations (17)

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D = j = 0 n - 1   b i 3 j ,
Step   one     X i + Y i = 3 c i + 1 + s i ,
Step   two     S i = c i + s i ,
  Addend : = 1961 10 = 2 2 1 2 ¯ 1 ¯ 0 1 ¯ .   Augend : = - 315 10 = 1 ¯ 1 2 1 2 ¯ 0 0 .   Intermediate   Carry : = 0 1 1 0 1 ¯ 0 0 Ø.   Intermediate   Sum : = Ø 1 0 0 1 ¯ 0 0 1 ¯ .   Final   Sum : = 1646 10 = 0 2 1 0 2 ¯ 0 0 1 ¯ .
X i - Y i = X i + Y ¯ i .
  Addend : = 1961 10 = Ø 2 2 1 2 ¯ 1 ¯ 0 1 ¯ Ø Ø Ø.   Augend : = - 315 10 = Ø 1 ¯ 1 2 1 2 ¯ 0 0 Ø Ø Ø.   Recoding : = 1 0 1 ¯ 0 1 1 ¯ 0 1 ¯ .   Recoding : = 0 0 1 ¯ 1 ¯ 0 1 0 0 .   Final   Sum : = 1646 10 = 1 0 2 ¯ 1 ¯ 1 0 0 1 ¯ .
  Addend : = 1961 10 = Ø 2 2 1 2 ¯ 1 ¯ 0 1 ¯ Ø.   Augend : = - 315 10 = Ø 1 ¯ 1 2 1 2 ¯ 0 0 Ø.   Final   Sum : = 1646 10 = 0 2 1 0 2 ¯ 0 0 1 ¯ .
I 2 ¯ i = p ¯ 1 p ¯ 2 p ¯ 3 p ¯ 4 p 5 , I 1 ¯ i = p ¯ 1 p ¯ 2 p ¯ 3 p 4 p ¯ 5 , I 0 i = p ¯ 1 p ¯ 2 p 3 p ¯ 4 p ¯ 5 , I 1 i = p ¯ 1 p 2 p ¯ 3 p ¯ 4 p ¯ 5 , I 2 i = p 1 p ¯ 2 p ¯ 3 p ¯ 4 p ¯ 5 ,
C 1 N 2 1 , C 2 N 1 + N 2 1 , C 3 N 1 + N 3 1 , C 4 N 1 + N 2 + N 3 1 , C 7 N 3 1 , C 3 N 2 1 ¯ , C 6 N 1 + N 2 + N 3 1 ¯ , C 7 N 1 + N 2 1 ¯ , C 8 N 1 + N 3 1 ¯ , C 9 N 3 1 ¯ , C 1 N 1 + N 3 0 , C 2 N 3 0 , C 5 N 1 + N 2 + N 3 0 , C 8 N 2 0 , C 9 N 1 + N 2 0 .
C 1 N 2 1 , C 2 N 1 1 , C 1 N 3 1 ¯ , C 3 N 1 1 ¯ , C 2 N 2 2 , C 3 N 3 2 ¯ , C 1 N 1 0 , C 2 N 3 0 , C 3 N 2 0 .
Ø Ø x 2 y 2 Ø Ø 0 1 ¯ x 2 y 2 x 1 y 1 = 0 1 ¯ 0 1 x 1 y 1 x 0 y 0 2 ¯ 0 2 ¯ 1 x 0 y 0 Ø Ø 2 ¯ 1 Ø Ø .
A = 00100 00100 00100 00010 00100 00010 00001 00100 00001 00100 00001 01000 00001 01000 00100 00100 ,
A r = 00100 00100 00100 01000 00100 01000 10000 00100 10000 00100 10000 00010 10000 00010 00100 00100 .
B = 0000   0000   1111   000   111   000 000   000   111 0000   1111   0000   000   000   111 000   111   000 1111   0000   0000   111   000   000 111   000   000 0000   0000   1111   000   111   000 000   000   111 0000   1111   0000   000   000   111 000   111   000 0000   0000   1111   000   000   111 000   000   111 1111   0000   0000   000   111   000 111   000   000 0000   1111   0000   111   000   000 000   111   000 0000   0000   1111   000   000   111 000   000   111 1111   0000   0000   000   111   000 111   000   000 0010   0010   0010   110   110   110 110   110   110 0110   0110   0110   101   101   101 101   101   101 1100   1100   1100   100   100   100 100   100   100 0101   0101   0101   000   000   000 000   000   000 0001   0001   0001   000   000   000 000   000   000 0001   0001   0001   110   110   110 110   110   110 1001   1001   1001   011   011   011 011   011   011 1100   1100   1100   010   010   010 010   010   010 1010   1010   1010   000   000   000 000   000   000 0010   0010   0010   000   000   000 000   000   000 Producing Producing Output   1 Output   2 .
CU = A × B = 3221   3221   2110   322   100   100 201   211   100 2112   1001   2112   121   010   121 122   120   120 1002   322 4   1002   122   011   122 011   233   011 3311   2311   2200   110   221   221 221   221   110 Output   1 Output   2 ,
CL = A r × B = 3212   3212   2101   333   111   111 222   222   111 3332   1110   1100   321   321   120 3 4 2   120   120 1020   2131   2131   221   221   110 110   221   221 2200   2200   44 22   110   221   221 110   110   332 Output   1 ¯ Output   2 ¯ .
P = AB = i = 0 2 n - 1   P i = i = 0 n - 1   pp i .

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