Abstract

The wormhole adaptive recovery-based routing via pre-emption (WARRP) core optoelectronic chip, which integrates core deadlock-handling circuitry for a fully adaptive deadlock-free multiprocessor network router, is presented. This chip demonstrates primarily the integration of complex deadlock-recovery circuitry and free-space optoelectronic input–output on a monolithic GaAs-based chip. The design and implementation of the first-generation, bit-serial, torus-connected chip that uses 1400 transistors and six light-emitting diode–photodetector pairs is presented.

© 1998 Optical Society of America

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