Abstract

A reconfigurable intelligent optical backplane architecture for parallel computing and communications is described. The backplane consists of a large number of reconfigurable optical channels organized in a ring with relatively simple point-to-point optical interconnections between neighboring smart-pixel arrays. The intelligent backplane can implement (1) dynamically reconfigurable connections between any printed circuit boards, (2) dynamic embeddings of classical interconnection networks such as buses, rings, multidimensional meshes, hypercubes, shuffles, and crossbars, (3) multipoint switching, (4) sorting, (5) parallel-prefix operations, (6) pattern-matching operations, (7) snoopy caches and intelligent memory systems, and (8) media-access control functions. The smart-pixel arrays can be enhanced to include more complex functions, such as queuing and routing, as the technologies mature. Descriptions of the architecture and the smart-pixel arrays and discussions of the system cost, availability, and performance are included.

© 1996 Optical Society of America

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1996

D. R. Rolston, B. Robertson, H. S. Hinton, D. V. Plant, “Analysis ofa microchannel interconnect based on the clustering of smart-pixel-device windows,” Appl. Opt. 35, 1220–1233 (1996).

1995

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

1994

H. S. Hinton, “Free space digital optical systems,” Proc. IEEE, 82, 1632–1649 (1994).

1993

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

K. Tamaru, “The trend of functional memory development” Inst. Electron. Inf. Commun. Eng. (Jpn.) Trans. Electron. E76 C, 1545–1554 (1993).

1992

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

Bacon, D. D.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Bertsekas, D.

D. Bertsekas, R. Gallager, Data Networks, 2nd ed. (Prentice-Hall, Englewood Cliffs, N.J., 1992), Chap. 2, p. 37.

Brooke, M. A.

C. Camperi-Ginestet, B. Buchanan, S. Wilkinson, N. M. Jokerst, M. A. Brooke, “Integration of InP-based thin film emitters and detectors onto a single silicon circuit, in Optical Computing, Vol. 10 of 1995 OSA Technical Digest Series (Optical Society of America, Washington, D.C., 1995), pp. 145–147.

Buchanan, B.

C. Camperi-Ginestet, B. Buchanan, S. Wilkinson, N. M. Jokerst, M. A. Brooke, “Integration of InP-based thin film emitters and detectors onto a single silicon circuit, in Optical Computing, Vol. 10 of 1995 OSA Technical Digest Series (Optical Society of America, Washington, D.C., 1995), pp. 145–147.

Camperi-Ginestet, C.

C. Camperi-Ginestet, B. Buchanan, S. Wilkinson, N. M. Jokerst, M. A. Brooke, “Integration of InP-based thin film emitters and detectors onto a single silicon circuit, in Optical Computing, Vol. 10 of 1995 OSA Technical Digest Series (Optical Society of America, Washington, D.C., 1995), pp. 145–147.

Chirovsky, L. M.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Chirovsky, L. M. F.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

D’Asaro, L. A.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Dahringer, D.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Dia Giacomo, J.

J. Dia Giacomo, Digital Bus Handbook (McGraw-Hill, New York, 1990), Chap. 18, p. 18.1.

Freund, J. M.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Fucht, M. W.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Fukushima, S.

S. Matsuo, T. Nakahara, Y. Kohama, Y. Ohisa, S. Fukushima, T. Kurokawa, “Photonic switch monolithically integrating an MSM PD, MESFETs, and a vertical-cavity surface-emitting laser,” in LEOS ’ 94 (IEEE, New York, 1994), postdeadline paper PD2.1.

Gallager, R.

D. Bertsekas, R. Gallager, Data Networks, 2nd ed. (Prentice-Hall, Englewood Cliffs, N.J., 1992), Chap. 2, p. 37.

Goossen, K.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Guth, G. G.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Hennessy, J. L.

J. L. Hennessy, D. A. Patterson, Computer Architecture: A Quantitative Approach (Morgan Kauffman, San Mateo, Calif., 1995), Chap. 9, p. 720.

Hinton, H. S.

D. R. Rolston, B. Robertson, H. S. Hinton, D. V. Plant, “Analysis ofa microchannel interconnect based on the clustering of smart-pixel-device windows,” Appl. Opt. 35, 1220–1233 (1996).

H. S. Hinton, “Free space digital optical systems,” Proc. IEEE, 82, 1632–1649 (1994).

T. H. Szymanski, H. S. Hinton, “Architecture of a terabit free-space photonic backplane,” in Proceedings of the International Conference on Optical Computing (IEEE, New York, 1995), pp. 141–144.

T. H. Szymanski, H. S. Hinton, “Design of a terabit free-space photonic backplane for parallel computing,” in Proceedings of the Second International Conference on Massively Parallel Processing using Optical Interconnects (IEEE Computer Society, Washington, D.C., 1995), pp. 16–27.

H. S. Hinton, T. H. Szymanski, “Intelligent optical back-planes,” in Proceedings of the International Conference on Massively Parallel Processing using Optical Interconnects (IEEE Computer Society, Washington, D.C., 1995), pp. 133–143.

H. S. Hinton, An Introduction to Photonic Switching Fabrics (Plenum, New York, 1993), Chap. 5, p. 245.

Hui, S. P.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Hwang, K.

K. Hwang, Advanced Computer Architecture: Parallelism, Scalability, Programmability, (McGraw-Hill, NewYork, 1993), Chap. 8.5, p. 465.

Jokerst, N. M.

C. Camperi-Ginestet, B. Buchanan, S. Wilkinson, N. M. Jokerst, M. A. Brooke, “Integration of InP-based thin film emitters and detectors onto a single silicon circuit, in Optical Computing, Vol. 10 of 1995 OSA Technical Digest Series (Optical Society of America, Washington, D.C., 1995), pp. 145–147.

Kohama, Y.

S. Matsuo, T. Nakahara, Y. Kohama, Y. Ohisa, S. Fukushima, T. Kurokawa, “Photonic switch monolithically integrating an MSM PD, MESFETs, and a vertical-cavity surface-emitting laser,” in LEOS ’ 94 (IEEE, New York, 1994), postdeadline paper PD2.1.

Kossives, D.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Kurokawa, T.

S. Matsuo, T. Nakahara, Y. Kohama, Y. Ohisa, S. Fukushima, T. Kurokawa, “Photonic switch monolithically integrating an MSM PD, MESFETs, and a vertical-cavity surface-emitting laser,” in LEOS ’ 94 (IEEE, New York, 1994), postdeadline paper PD2.1.

Laskowski, E. J.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Leibenguth, R.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Leibenguth, R. E.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Lentine, A. L.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Levi, A. F.

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

Logan, R. A.

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

Matsuo, S.

S. Matsuo, T. Nakahara, Y. Kohama, Y. Ohisa, S. Fukushima, T. Kurokawa, “Photonic switch monolithically integrating an MSM PD, MESFETs, and a vertical-cavity surface-emitting laser,” in LEOS ’ 94 (IEEE, New York, 1994), postdeadline paper PD2.1.

Miller, D. A. B.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Nakahara, T.

S. Matsuo, T. Nakahara, Y. Kohama, Y. Ohisa, S. Fukushima, T. Kurokawa, “Photonic switch monolithically integrating an MSM PD, MESFETs, and a vertical-cavity surface-emitting laser,” in LEOS ’ 94 (IEEE, New York, 1994), postdeadline paper PD2.1.

Nordin, R. A.

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

Nottenburg, R. N.

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

O’Gorman, J.

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

Ohisa, Y.

S. Matsuo, T. Nakahara, Y. Kohama, Y. Ohisa, S. Fukushima, T. Kurokawa, “Photonic switch monolithically integrating an MSM PD, MESFETs, and a vertical-cavity surface-emitting laser,” in LEOS ’ 94 (IEEE, New York, 1994), postdeadline paper PD2.1.

Patterson, D. A.

J. L. Hennessy, D. A. Patterson, Computer Architecture: A Quantitative Approach (Morgan Kauffman, San Mateo, Calif., 1995), Chap. 9, p. 720.

Pei, S. S.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Plant, D. V.

D. R. Rolston, B. Robertson, H. S. Hinton, D. V. Plant, “Analysis ofa microchannel interconnect based on the clustering of smart-pixel-device windows,” Appl. Opt. 35, 1220–1233 (1996).

Redmond, I.

I. Redmond, E. Schenfeld, “A distributed reconfigurable free-space optical interconnection network for massively parallel processing architectures,” in Proceedings of the International Conference on Optical Computing (IEEE, New York, 1995), pp. 215–218.

Robertson, B.

D. R. Rolston, B. Robertson, H. S. Hinton, D. V. Plant, “Analysis ofa microchannel interconnect based on the clustering of smart-pixel-device windows,” Appl. Opt. 35, 1220–1233 (1996).

Rolston, D. R.

D. R. Rolston, B. Robertson, H. S. Hinton, D. V. Plant, “Analysis ofa microchannel interconnect based on the clustering of smart-pixel-device windows,” Appl. Opt. 35, 1220–1233 (1996).

Schenfeld, E.

I. Redmond, E. Schenfeld, “A distributed reconfigurable free-space optical interconnection network for massively parallel processing architectures,” in Proceedings of the International Conference on Optical Computing (IEEE, New York, 1995), pp. 215–218.

Smith, L. E.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Szymanski, T. H.

H. S. Hinton, T. H. Szymanski, “Intelligent optical back-planes,” in Proceedings of the International Conference on Massively Parallel Processing using Optical Interconnects (IEEE Computer Society, Washington, D.C., 1995), pp. 133–143.

T. H. Szymanski, “Intelligent optical backplanes,” in Optical Computing, Vol. 10 of 1995 OSA Technical Digest Series (Optical Society of America, Washington, D.C., 1995), pp. 11–13.

T. H. Szymanski, H. S. Hinton, “Design of a terabit free-space photonic backplane for parallel computing,” in Proceedings of the Second International Conference on Massively Parallel Processing using Optical Interconnects (IEEE Computer Society, Washington, D.C., 1995), pp. 16–27.

T. H. Szymanski, H. S. Hinton, “Architecture of a terabit free-space photonic backplane,” in Proceedings of the International Conference on Optical Computing (IEEE, New York, 1995), pp. 141–144.

Tamaru, K.

K. Tamaru, “The trend of functional memory development” Inst. Electron. Inf. Commun. Eng. (Jpn.) Trans. Electron. E76 C, 1545–1554 (1993).

Tanbun-Ek, T.

R. A. Nordin, A. F. Levi, R. N. Nottenburg, J. O’Gorman, T. Tanbun-Ek, R. A. Logan, “A systems perspective on digital interconnection technology” J. Lightwave Technol. 10, 811–827 (1992).

Tseng, B.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Walker, J. A.

K. Goossen, J. A. Walker, L. A. D’Asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, D. A. B. Miller, “GaAs MQW modulators integrated with silicon CMOS” IEEE Photon. Technol. Lett. 7, 360–362 (1995).

Wilkinson, S.

C. Camperi-Ginestet, B. Buchanan, S. Wilkinson, N. M. Jokerst, M. A. Brooke, “Integration of InP-based thin film emitters and detectors onto a single silicon circuit, in Optical Computing, Vol. 10 of 1995 OSA Technical Digest Series (Optical Society of America, Washington, D.C., 1995), pp. 145–147.

Woodward, T. K.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

Appl. Opt.

D. R. Rolston, B. Robertson, H. S. Hinton, D. V. Plant, “Analysis ofa microchannel interconnect based on the clustering of smart-pixel-device windows,” Appl. Opt. 35, 1220–1233 (1996).

IEEE J. Quantum Electron.

L. A. D’Asaro, L. M. Chirovsky, E. J. Laskowski, S. S. Pei, T. K. Woodward, A. L. Lentine, R. E. Leibenguth, M. W. Fucht, J. M. Freund, G. G. Guth, L. E. Smith, “Batch fabrication and operation of GaAs–AlxGa1−xAs field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays”, IEEE J. Quantum Electron. 29, 670–677 (1993).

IEEE Photon. Technol. Lett.

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Figures (13)

Fig. 1
Fig. 1

Free-space optical backplane.

Fig. 2
Fig. 2

Projected aggregate capacity per SPA. CMOS, complementary metal-oxide semiconductor; SEED, self-electro-optic-effect device; MSM, metal–semiconductor–metal; VCSEL, vertical-cavity surface-emitting laser; FET, field-effect transistor; S-SEED, symmetric SEED; ELO, epitaxial lift-off.

Fig. 3
Fig. 3

Methods of point-to-point optical interconnection: (a) bulk optical imaging, (b) lenslet-based microchannels.

Fig. 4
Fig. 4

HyperPlane connectivity model. MP’s, message processors; PE’s, processing elements.

Fig. 5
Fig. 5

(a) Embedding of a 3D 8 × 8 × 8 mesh for a Cray Research T3D supercomputer into a bidirectional circular HyperPlane. (Each bold line represents 24 bytewide channels, and the complete embedding uses 240 channels in each direction.) (b) Embedding of a multichannel broadcast switch into a unidirectional circular HyperPlane. (Each bold line represents four bytewide channels, and each PCB has access to a contention-free 128-bit-wide reconfigurable bus.)

Fig. 6
Fig. 6

Basic HyperPlane smart pixel.

Fig. 7
Fig. 7

Four basic states of a HyperPlane smart pixel.

Fig. 8
Fig. 8

2D slice of pixels with four optical channels, three injector channels, and three extractor channels (only the four most significant bits of each channel are shown). CCU’s, channel control units.

Fig. 9
Fig. 9

Smart-pixel organizations with varying ratios of electrical-to-optical output bandwidth: (a) 1/16, (b) 1/2, (c) 1/2, (d) 1/1.

Fig. 10
Fig. 10

(a) Decoder for writing control bits to control latches, (b) CCU for reconfigurable backplane, (c) CCU for reconfigurable intelligent backplane.

Fig. 11
Fig. 11

Address-comparator circuits for performing (a) address detection, (b) multipoint switching, (c) multipoint switching or Hamming distance computations with logarithmic delay. (Processing of only four pixels is shown.)

Fig. 12
Fig. 12

Packet blocking probability in a multichannel broadcast-based backplane (blocking is due to contention for extractors at destination PCB’s): (a) packet blocking probability versus offered load for a multichannel switch with I = 1, E = 1 … 8; (b) packet blocking probability versus offered load for a multichannel switch with I = 4, E = 1 … 8; (c) packet blocking probability versus offered load for a multichannel switch with S = 4, I = 1, E = 1 … 8.

Fig. 13
Fig. 13

(a) Aggregate bandwidth of 900 Gb/s is achievable, given a random uniform traffic model. (b) Packet delays of 100–200 ns are achievable in a system that support 256 processors and 32 PCB’s, with each PCB generating backplane traffic at 25.6 Gb/s. The filled circles indicate the operating points of the 32-board optical backplane.

Equations (8)

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             L  bit mask  = m L 1    m 0 , L  bit address  = I L 1    I 0 , L  bit destination = d L 1    d 0 , Extract  =  NOT [ m L 1 ( I L 1 d L 1 ) + + m 0 ( I 0 d 0 ) ] ,
L bit lower bound = M L 1    M 0 , L bit upper bound = N L 1    N 0 ,                    L bit key = k L 1    k 0 ,                         Extract = ( k e y M ) ( k e y N ) ,                         Extract = NOT [ ( k e y M ) ( k e y N ) ] ,                         Extract = ( k e y M ) ,                         Extract = ( k e y N ) .
L bit patter n i = p L 1 , i    p 0 , i , L bit mask = m L 1    m 0 , L bit key = d L 1    d 0 , Extract = max { [ m L 1 ( p L 1 , i θ d L 1 ) ] + + [ m 0 ( p 0 , i θ d 0 ) ] } , Extract = f ( { [ m L 1 ( p L 1 , i θ d L 1 ) ] + + [ m 0 ( p 0 , i θ d 0 ) ] } ) .
T = L / ( Z w / I N ) = 32 / [ 512 / ( 8 × 32 ) ] = 16 , P = ( N 1 ) / V = 31 / 4 = 8 .
BW α Z ( 1 PB ) ( w B ) .
PB = N α I C [ j = E + 1 ( j E ) exp  ( α I C / N ) ( α I C / N ) j j ! ] .
C ¯ = i = 0 Y Y i ρ i i ! i P 0 + i = Y + 1 Y Y ρ i Y ! i P 0 ,
Z ¯ = { λ if λ  Y μ Y μ if λ > Y μ ,

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