Abstract

A high-accuracy optical multiplier that uses an optical correlator is described. A symbolic substitution adder that uses the modified signed-digit number representation is used as the basic module. Emphasis is placed on the multiplication of many long words in parallel with minimum latency. The encoding method we employ in the adders permits the use of a new optical algorithm and architecture to generate partial products in symbolic form in parallel. Our multiplication algorithm and architecture are shown to be preferable to other optical techniques and to be competitive with digital technology; they are also shown to be particularly attractive for matrix–vector multiplication applications.

© 1994 Optical Society of America

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    [CrossRef]
  2. A. Huang, Y. Tsunoda, J. W. Goodman, S. Ishihara, “Optical computing using residue arithmetic,” Appl. Opt. 18, 149–162 (1979).
    [CrossRef] [PubMed]
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    [CrossRef] [PubMed]
  5. Y. Li, D. H. Kim, A. Kotrzewski, G. Eichmann, “Content-addressable-memory-based single-stage optical modified-signed-digit arithmetic,” Opt. Lett. 14, 1254–1256 (1989).
    [CrossRef] [PubMed]
  6. Z. Zucker, R. Alferness, “Photonic switches set to prosper,” Phys. World 4(9), 57–60 (1991).
  7. M. Murdocca, A Digital Design Methodology for Optical Computing (MIT, Cambridge, Mass., 1990).
  8. P. Guilfoyle, R. Stone, “Digital optical computer II,” in Optical Enhancements to Computing Technology, J. Neff, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1563, 214–222 (1991).
  9. V. Heuring, H. Jordan, J. Pratt, “Bit-serial architecture for optical computing,” Appl. Opt. 31, 3213–3224 (1992).
    [CrossRef] [PubMed]
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  12. K.-H. Brenner, “New implementation of symbolic substitution logic,” Appl. Opt. 25, 3061–3064 (1986).
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  15. M. Karim, A. Awwal, A. Cherri, “Polarization-encoded optical shadow-casting logic units: design,” Appl. Opt. 26, 2720–2725 (1987).
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    [CrossRef]
  19. K. Hwang, A. Louri, “Optical multiplication and division using modified-signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).
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    [CrossRef]
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  24. M. Lasher, T. Henderson, B. Drake, R. Bocker, “Encoding schemes for a digital optical multiplier using the modified signed-digit number representation,” in Optical Information Processing II, D. Pape, ed., Proc. Soc. Photo-Opt. Instrum. Eng.639, 76–88 (1986).
  25. B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic computing using the modified signed-digit number representation,” Opt. Eng. 25, 38–43 (1986).
  26. K. Brenner, M. Kufner, S. Kufner, “Highly parallel arithmetic algorithms for a digital optical processor using symbolic substitution logic,” Appl. Opt. 29, 1610–1618 (1990).
    [CrossRef] [PubMed]
  27. N. Kato, R. Sekura, J. Yamanaka, T. Ebihara, S. Yamamoto, ‘Characteristics of a ferroelectric liquid crystal spatial light modulator with a dielectric mirror,” in Liquid-Crystal Devices and Materials, P. S. Drzaic, U. Efron, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1455, 190–205 (1991).
  28. G. Moddel, P. R. Barbier, “Response time of a-Si:H photosensors in optically addressed spatial light modulators,” in Proceedings of the Amorphous Silicon Technology-1991 Symposium, A. Madan, Y. Hamakawa, M. Thompson, P. C. Taylor, P. LeComber, eds. (Materials Research Society, Pittsburgh, Pa., 1991), pp. 155–165.
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    [CrossRef]
  30. H. Hinton, A. Lentine, “Multiple quantum-well technology takes SEED,” IEEE Circuits Devices 9(2), 12–18 (1993).
    [CrossRef]
  31. L. Chirovsky, “Massive connectivity and SEED’s,” in Devices for Optical Processing, D. Gookin, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1562, 228–241 (1991).
  32. M. Santoro, M. Horowitz, “SPIM: a pipelined 64 × 64-bit iterative multiplier,” IEEE J. Solid-State Circuits 24, 487–493 (1989).
    [CrossRef]
  33. B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
    [CrossRef]
  34. S. Yamamoto, R. Sekura, J. Yamanaka, T. Ebihara, N. Kato, H. Hosi, “Optical pattern recognition with LAPS-SLM,” in Computer and Optically Formed Holographic Optics, I. Cindrich, S. H. Lee, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1211, 273–283 (1990).
  35. M. Roe, K. Schnehrer, “High-speed and high-contrast operation of ferroelectric liquid crystal optically addressed spatial light modulators,” Opt. Eng. 32, 1662–1667 (1993).
    [CrossRef]

1994 (1)

D. Casasent, P. Woodford, “Symbolic substitution MSD optical adder,” Appl. Opt. 33, add page nos. (1994).
[CrossRef]

1993 (2)

H. Hinton, A. Lentine, “Multiple quantum-well technology takes SEED,” IEEE Circuits Devices 9(2), 12–18 (1993).
[CrossRef]

M. Roe, K. Schnehrer, “High-speed and high-contrast operation of ferroelectric liquid crystal optically addressed spatial light modulators,” Opt. Eng. 32, 1662–1667 (1993).
[CrossRef]

1992 (1)

1991 (1)

Z. Zucker, R. Alferness, “Photonic switches set to prosper,” Phys. World 4(9), 57–60 (1991).

1990 (2)

K. Brenner, M. Kufner, S. Kufner, “Highly parallel arithmetic algorithms for a digital optical processor using symbolic substitution logic,” Appl. Opt. 29, 1610–1618 (1990).
[CrossRef] [PubMed]

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

1989 (6)

M. Santoro, M. Horowitz, “SPIM: a pipelined 64 × 64-bit iterative multiplier,” IEEE J. Solid-State Circuits 24, 487–493 (1989).
[CrossRef]

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

D. Casasent, E. Botha, “Multifunctional optical processor based on symbolic substitution,” Opt. Eng. 28, 425–433 (1989).

K. Hwang, A. Louri, “Optical multiplication and division using modified-signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).

C. Perlee, D. Casasent, “Optical systems for digit serial computation,” Appl. Opt. 28, 611–626 (1989).
[CrossRef] [PubMed]

Y. Li, D. H. Kim, A. Kotrzewski, G. Eichmann, “Content-addressable-memory-based single-stage optical modified-signed-digit arithmetic,” Opt. Lett. 14, 1254–1256 (1989).
[CrossRef] [PubMed]

1988 (1)

1987 (1)

1986 (4)

1985 (1)

N. Takagi, H. Yasuura, S. Yajima, “High-speed VLSI multiplication algorithm with a redundant binary addition tree,” IEEE Trans. Comput. C-34, 789–796 (1985).
[CrossRef]

1983 (1)

1979 (1)

1978 (1)

D. Heller, “A survey of parallel algorithms in numerical algebra,” SIAM Rev. 20, 740–777 (1978).
[CrossRef]

1961 (1)

A. Avizienis, “Signed-digit number representation for fast parallel arithmetic,” IRE Trans. Electron. Comput. EC-10, 389–400 (1961).
[CrossRef]

Alferness, R.

Z. Zucker, R. Alferness, “Photonic switches set to prosper,” Phys. World 4(9), 57–60 (1991).

Athale, R. A.

Avizienis, A.

A. Avizienis, “Signed-digit number representation for fast parallel arithmetic,” IRE Trans. Electron. Comput. EC-10, 389–400 (1961).
[CrossRef]

Awwal, A.

Barbier, P. R.

G. Moddel, P. R. Barbier, “Response time of a-Si:H photosensors in optically addressed spatial light modulators,” in Proceedings of the Amorphous Silicon Technology-1991 Symposium, A. Madan, Y. Hamakawa, M. Thompson, P. C. Taylor, P. LeComber, eds. (Materials Research Society, Pittsburgh, Pa., 1991), pp. 155–165.

Benschneider, B.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Bocker, R.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic computing using the modified signed-digit number representation,” Opt. Eng. 25, 38–43 (1986).

M. Lasher, T. Henderson, B. Drake, R. Bocker, “Encoding schemes for a digital optical multiplier using the modified signed-digit number representation,” in Optical Information Processing II, D. Pape, ed., Proc. Soc. Photo-Opt. Instrum. Eng.639, 76–88 (1986).

Botha, E.

D. Casasent, E. Botha, “Multifunctional optical processor based on symbolic substitution,” Opt. Eng. 28, 425–433 (1989).

Bowhil, W.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Boyd, G.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Brenner, K.

Brenner, K.-H.

Casasent, D.

D. Casasent, P. Woodford, “Symbolic substitution MSD optical adder,” Appl. Opt. 33, add page nos. (1994).
[CrossRef]

C. Perlee, D. Casasent, “Optical systems for digit serial computation,” Appl. Opt. 28, 611–626 (1989).
[CrossRef] [PubMed]

D. Casasent, E. Botha, “Multifunctional optical processor based on symbolic substitution,” Opt. Eng. 28, 425–433 (1989).

D. Casasent, P. Woodford, “Correlation-based optical numeric processors,” in Optical Enhancements to Computing Technology, J. Neff, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1563, 112–119 (1991).

Cherri, A.

Chirovsky, L.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

L. Chirovsky, “Massive connectivity and SEED’s,” in Devices for Optical Processing, D. Gookin, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1562, 228–241 (1991).

Cooper, E.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

D’Asaro, L.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Dhall, S. K.

S. Lakshmivarahan, S. K. Dhall, Analysis and Design of Parallel Algorithms (McGraw-Hill, New York, 1990), Chap. 1.

Drake, B.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic computing using the modified signed-digit number representation,” Opt. Eng. 25, 38–43 (1986).

M. Lasher, T. Henderson, B. Drake, R. Bocker, “Encoding schemes for a digital optical multiplier using the modified signed-digit number representation,” in Optical Information Processing II, D. Pape, ed., Proc. Soc. Photo-Opt. Instrum. Eng.639, 76–88 (1986).

Ebihara, T.

N. Kato, R. Sekura, J. Yamanaka, T. Ebihara, S. Yamamoto, ‘Characteristics of a ferroelectric liquid crystal spatial light modulator with a dielectric mirror,” in Liquid-Crystal Devices and Materials, P. S. Drzaic, U. Efron, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1455, 190–205 (1991).

S. Yamamoto, R. Sekura, J. Yamanaka, T. Ebihara, N. Kato, H. Hosi, “Optical pattern recognition with LAPS-SLM,” in Computer and Optically Formed Holographic Optics, I. Cindrich, S. H. Lee, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1211, 273–283 (1990).

Eichmann, G.

Gavrielov, M.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Goodman, J. W.

Gronowski, P.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Guilfoyle, P.

P. Guilfoyle, R. Stone, “Digital optical computer II,” in Optical Enhancements to Computing Technology, J. Neff, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1563, 214–222 (1991).

Heller, D.

D. Heller, “A survey of parallel algorithms in numerical algebra,” SIAM Rev. 20, 740–777 (1978).
[CrossRef]

Henderson, T.

M. Lasher, T. Henderson, B. Drake, R. Bocker, “Encoding schemes for a digital optical multiplier using the modified signed-digit number representation,” in Optical Information Processing II, D. Pape, ed., Proc. Soc. Photo-Opt. Instrum. Eng.639, 76–88 (1986).

Heuring, V.

Hinton, H.

H. Hinton, A. Lentine, “Multiple quantum-well technology takes SEED,” IEEE Circuits Devices 9(2), 12–18 (1993).
[CrossRef]

Horowitz, M.

M. Santoro, M. Horowitz, “SPIM: a pipelined 64 × 64-bit iterative multiplier,” IEEE J. Solid-State Circuits 24, 487–493 (1989).
[CrossRef]

Hosi, H.

S. Yamamoto, R. Sekura, J. Yamanaka, T. Ebihara, N. Kato, H. Hosi, “Optical pattern recognition with LAPS-SLM,” in Computer and Optically Formed Holographic Optics, I. Cindrich, S. H. Lee, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1211, 273–283 (1990).

Huang, A.

K.-H. Brenner, A. Huang, N. Streibl, “Digital optical computing with symbolic substitution,” Appl. Opt. 25, 3054–3060 (1986).
[CrossRef] [PubMed]

A. Huang, Y. Tsunoda, J. W. Goodman, S. Ishihara, “Optical computing using residue arithmetic,” Appl. Opt. 18, 149–162 (1979).
[CrossRef] [PubMed]

A. Huang, “Parallel algorithms for optical digital computing,” in Proceedings of the IEEE Tenth International Optical Computing Conference, S. Horvitz, ed. (Institute for Electrical and Electronics Engineers, New York, 1983), pp. 13–17.

Hwang, K.

K. Hwang, A. Louri, “Optical multiplication and division using modified-signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).

Ichioka, Y.

Ichoka, Y.

Ishihara, S.

Jordan, H.

Karim, M.

Kato, N.

N. Kato, R. Sekura, J. Yamanaka, T. Ebihara, S. Yamamoto, ‘Characteristics of a ferroelectric liquid crystal spatial light modulator with a dielectric mirror,” in Liquid-Crystal Devices and Materials, P. S. Drzaic, U. Efron, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1455, 190–205 (1991).

S. Yamamoto, R. Sekura, J. Yamanaka, T. Ebihara, N. Kato, H. Hosi, “Optical pattern recognition with LAPS-SLM,” in Computer and Optically Formed Holographic Optics, I. Cindrich, S. H. Lee, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1211, 273–283 (1990).

Kim, D. H.

Kopf, R.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Kotrzewski, A.

Kufner, M.

Kufner, S.

Kuo, J.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Lakshmivarahan, S.

S. Lakshmivarahan, S. K. Dhall, Analysis and Design of Parallel Algorithms (McGraw-Hill, New York, 1990), Chap. 1.

Lasher, M.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic computing using the modified signed-digit number representation,” Opt. Eng. 25, 38–43 (1986).

M. Lasher, T. Henderson, B. Drake, R. Bocker, “Encoding schemes for a digital optical multiplier using the modified signed-digit number representation,” in Optical Information Processing II, D. Pape, ed., Proc. Soc. Photo-Opt. Instrum. Eng.639, 76–88 (1986).

Lentine, A.

H. Hinton, A. Lentine, “Multiple quantum-well technology takes SEED,” IEEE Circuits Devices 9(2), 12–18 (1993).
[CrossRef]

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Li, Y.

Louri, A.

K. Hwang, A. Louri, “Optical multiplication and division using modified-signed-digit symbolic substitution,” Opt. Eng. 28, 364–372 (1989).

Maheshwari, V.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

McCormick, F.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Miceli, W.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic computing using the modified signed-digit number representation,” Opt. Eng. 25, 38–43 (1986).

Moddel, G.

G. Moddel, P. R. Barbier, “Response time of a-Si:H photosensors in optically addressed spatial light modulators,” in Proceedings of the Amorphous Silicon Technology-1991 Symposium, A. Madan, Y. Hamakawa, M. Thompson, P. C. Taylor, P. LeComber, eds. (Materials Research Society, Pittsburgh, Pa., 1991), pp. 155–165.

Murdocca, M.

M. Murdocca, A Digital Design Methodology for Optical Computing (MIT, Cambridge, Mass., 1990).

Nakagawa, J.

Novotony, R.

A. Lentine, F. McCormick, R. Novotony, L. Chirovsky, L. D’Asaro, R. Kopf, J. Kuo, G. Boyd, “A 2 kilobit array of symmetric self-electro-optic effect devices,” IEEE Photon. Tech. Lett. 2, 51–53 (1990).
[CrossRef]

Patterson, R.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic computing using the modified signed-digit number representation,” Opt. Eng. 25, 38–43 (1986).

Peng, V.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Perlee, C.

Pickholtz, J.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Pratt, J.

Psaltis, D.

Roe, M.

M. Roe, K. Schnehrer, “High-speed and high-contrast operation of ferroelectric liquid crystal optically addressed spatial light modulators,” Opt. Eng. 32, 1662–1667 (1993).
[CrossRef]

Samudrala, S.

B. Benschneider, W. Bowhil, E. Cooper, M. Gavrielov, P. Gronowski, V. Maheshwari, V. Peng, J. Pickholtz, S. Samudrala, “A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor,” IEEE J. Solid-State Circuits 24, 1317–1323 (1989).
[CrossRef]

Santoro, M.

M. Santoro, M. Horowitz, “SPIM: a pipelined 64 × 64-bit iterative multiplier,” IEEE J. Solid-State Circuits 24, 487–493 (1989).
[CrossRef]

Schnehrer, K.

M. Roe, K. Schnehrer, “High-speed and high-contrast operation of ferroelectric liquid crystal optically addressed spatial light modulators,” Opt. Eng. 32, 1662–1667 (1993).
[CrossRef]

Sekura, R.

S. Yamamoto, R. Sekura, J. Yamanaka, T. Ebihara, N. Kato, H. Hosi, “Optical pattern recognition with LAPS-SLM,” in Computer and Optically Formed Holographic Optics, I. Cindrich, S. H. Lee, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1211, 273–283 (1990).

N. Kato, R. Sekura, J. Yamanaka, T. Ebihara, S. Yamamoto, ‘Characteristics of a ferroelectric liquid crystal spatial light modulator with a dielectric mirror,” in Liquid-Crystal Devices and Materials, P. S. Drzaic, U. Efron, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1455, 190–205 (1991).

Stone, R.

P. Guilfoyle, R. Stone, “Digital optical computer II,” in Optical Enhancements to Computing Technology, J. Neff, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1563, 214–222 (1991).

Streibl, N.

Takagi, N.

N. Takagi, H. Yasuura, S. Yajima, “High-speed VLSI multiplication algorithm with a redundant binary addition tree,” IEEE Trans. Comput. C-34, 789–796 (1985).
[CrossRef]

N. Takagi, “Arithmetic unit based on a high-speed multiplier with a redundant binary addition tree,” in Advanced Signal Processing Algorithms, Architectures, and Implementations II, F. Luk, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1566, 244–251 (1991).

Tanida, J.

Tsunoda, Y.

Woodford, P.

D. Casasent, P. Woodford, “Symbolic substitution MSD optical adder,” Appl. Opt. 33, add page nos. (1994).
[CrossRef]

D. Casasent, P. Woodford, “Correlation-based optical numeric processors,” in Optical Enhancements to Computing Technology, J. Neff, ed., Proc. Soc. Photo-Opt. Instrum. Eng.1563, 112–119 (1991).

Yajima, S.

N. Takagi, H. Yasuura, S. Yajima, “High-speed VLSI multiplication algorithm with a redundant binary addition tree,” IEEE Trans. Comput. C-34, 789–796 (1985).
[CrossRef]

Yamamoto, S.

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Figures (9)

Fig. 1
Fig. 1

Standard optical frequency plane correlator architecture.

Fig. 2
Fig. 2

Basic MSD SS adder module.

Fig. 3
Fig. 3

Multiplication of two 4-bit numbers.

Fig. 4
Fig. 4

Three steps of PP generation: L’s, lenses; S’s, planes.

Fig. 5
Fig. 5

Utilization of the adders in the binary-tree algorithm.

Fig. 6
Fig. 6

Block diagram showing the input adder data and output adder feedback used in our pipelined iterative-tree algorithm.

Fig. 7
Fig. 7

Pipelined iterative-tree sequence of multiplications (M = 2).

Fig. 8
Fig. 8

Flow of PP’s in our pipelined iterative-tree algorithm.

Fig. 9
Fig. 9

Utilization of our pipelined iterative-tree algorithm for n = 64-bit words. (If the devices can handle M MP’s in parallel, then the horizontal axis is multiplied by M/2).

Tables (1)

Tables Icon

Table 1 Multiplier Notation Used

Equations (10)

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P = A B = i = 0 n - 1 P ( i ) = i = 0 n - 1 A b i 2 i .
X = [ 1 , 1 1 , 0 1 , 1 ¯ 0 , 0 0 , 1 ¯ 1 ¯ , 1 ¯ ] ,
Y = [ 1 0 1 ¯ 0 0 1 ] ,
1 = [ 1 0 0 1 1 0 ] T , 0 = [ 0 1 0 1 0 1 ] T , 1 ¯ = [ 0 0 1 0 1 1 ] T ,
F = [ - 2 - 2 - 2 1 1 1 0 1 0 0 0 0 1 0 1 0 - 1 0 - 2 - 1 - 2 1 2 1 - 1 - 2 - 1 1 1 1 1 1 1 0 - 1 0 ] .
η B = 2 ( n - 1 ) n log 2 n .
M = SBW P / ( n P ) 2 = SBWP / n 2 P
N = n M / 2
l = ( 1 + 3 log 2 n ) t s ,
M / 2 t s = SBW P 2 n 2 P 2 t s = SBWP 2 n 2 P t s multiplications / s ,

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