Abstract

We present a textbooklike treatment of hybrid systems employing both optical and electrical interconnections. We investigate how these two different interconnection media can be used in conjunction to realize a system not possible with any alone. More specifically, we determine the optimal mix of optical and normally conducting interconnections maximizing a given figure-of-merit function. We find that optical interconnections have relatively little to offer if the optical paths are constrained to lie on a plane (such as in an integrated optics system). However, if optical paths are permitted to leave the plane, they may enable considerable increase in performance. In any event the prize in terms of performance is accompanied by a penalty in terms of system power and/or size.

© 1994 Optical Society of America

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  1. K. C. Saraswat, F. Mohammadi, “Effect of scaling of interconnections on the time delay of VLSI circuits,” IEEE Trans. Electron Devices ED-29, 645–650 (1982).
    [CrossRef]
  2. H. B. Bakoglu, Circuits, Interconnections and Packaging for VLSI (Addison-Wesley, Reading, Mass.1990).
  3. W. D. Hillis, “New computer architectures and their relationship to physics or why computer science is no good,” Int. J. Theor. Phys. 21, 255–262 (1982).
    [CrossRef]
  4. R. W. Keyes, “Communication in computation,” Int. J. Theor. Phys. 21, 263–273 (1982).
    [CrossRef]
  5. J. W. Goodman, F. J. Leonbergere, S.-Y. Kung, R. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866(1984).
    [CrossRef]
  6. R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectronic chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
    [CrossRef] [PubMed]
  7. P. R. Haugen, S. Rychnovsky, A. Husain, L. D. Hutcheson, “Optical interconnects for high-speed computing,” Opt. Eng 25, 1076 (1986).
  8. L. D. Hutcheson, P. Haugen, “Optical interconnects replace hardwire,” IEEE Spectrum (March1987), pp. 30–35.
  9. D. A. B. Miller, “Optics for low-energy communication inside digital processors: quantum detectors, sources and modulators as efficient impedance converters,” Opt. Lett. 14, 146–148 (1989).
    [CrossRef] [PubMed]
  10. W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
    [CrossRef]
  11. H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
    [CrossRef]
  12. O. K. Kwon, B. W. Langley, R. F. W. Pease, M. R. Beasley, “Superconductors as very-high-speed system-level interconnects,” IEEE Electron Device Lett. 8, 582–585 (1987).
    [CrossRef]
  13. R. C. Frye, “Analysis of the trade-offs between conventional and superconducting interconnections,” IEEE Circuits Devices Mag. (May1989), pp. 27–32.
    [CrossRef]
  14. H. M. Ozaktas, J. W. Goodman, “The limitations of interconnections in providing communication between an array of points,” in Frontiers of Computing Systems Research, S. K. Tewksbury, ed. (Plenum, New York, 1991), Vol. 2, pp. 61–130.
    [CrossRef]
  15. M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
    [CrossRef] [PubMed]
  16. M. R. Feldman, C. C. Guest, T. J. Drabik, S. C. Esener, “Comparison between electrical and free space optical interconnects for fine grain processor arrays based on interconnect density capabilities,” Appl. Opt. 28, 3820–3829 (1989).
    [CrossRef] [PubMed]
  17. C. W. Stirk, D. Psaltis, “Comparison of optical and electronic three-dimensional circuits,” in Microelectronic Interconnects and Packaging, G. Arijavalingam, J. Pazaris, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1389, 580–593 (1990).
  18. F. E. Kiamilev, P. Marchand, A. V. Krishnamoorthy, S. C. Esener, S. H. Lee, “Performance comparison bewteen optoelectronic and VLSI multistage interconnection networks,” J. Lightwave Technol. 9, 1674–1692 (1991).
    [CrossRef]
  19. A. V. Krishnamoorthy, P. J. Marchand, F. E. Kiamilev, S. C. Esener, “Grain-size considerations for optoelectronic multistage interconnection networks, Appl. Opt. 31, 5480–5507 (1992).
    [CrossRef] [PubMed]
  20. H. M. Ozaktas, J. W. Goodman, “Optimal partitioning of very-large-scale optoelectronic computing systems,” in Annual Meeting, Vol. 15 of 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), p. 87.
  21. H. M. Ozaktas, “A physical approach to communication limits in computation,” Ph.D. dissertation (Stanford University, Stanford, Calif., 1991).
  22. H. M. Ozaktas, “Paradigms of connectivity for computer circuits and networks,” Opt. Eng. 31, 1563–1567 (1992).
    [CrossRef]
  23. W. E. Donath, “Wire length distribution for placements of computer logic,” IBM J. Res. Dev. 25, 152–155 (1981).
    [CrossRef]
  24. M. Feuer, “Connectivity of random logic,” IEEE Trans. Comput. C-31, 29–33 (1982).
    [CrossRef]
  25. A. El Gamal, “Two-dimensional stochastic model for interconnections in master slice integrated circuits,” IEEE Trans. Circuits Syst. CS-28, 127–134 (1981).
    [CrossRef]
  26. W. R. Heller, W. F. Mikhail, W. E. Donath, “Prediction of wiring space requirements for LSI,” J. Des. Autom. Fault Tolerant Comput. 2, 117–144 (1978).
  27. H. M. Ozaktas, H. Oksuzoglu, R. F. W. Pease, J. W. Goodman, “Effect on scaling of heat removal requirements in three-dimensional systems,” Int. J. Electron. 73, 1227–1232 (1992).
    [CrossRef]
  28. H. M. Ozaktas, J. W. Goodman, “Lower bound for the communication volume required for an optically interconnected array of points,” J. Opt. Soc. Am. A 7, 2100–2106 (1990).
    [CrossRef]
  29. H. M. Ozaktas, Y. Amitai, J. W. Goodman, “A three-dimensional optical interconnection architecture with minimal growth rate of system size,” Opt. Commun. 85, 1–4 (1991).
    [CrossRef]
  30. M. R. Feldman, C. C. Guest, “Interconnect density capabilities of computer-generated holograms for optical interconnection of very-large-scale-integrated circuits,” Appl. Opt. 28, 3134–3137 (1989).
    [CrossRef] [PubMed]
  31. H. B. Bakoglu, J. D. Meindl, “Optimal interconnection circuits for VLSI,” IEEE Trans. Electron. Devices 32, 903–909(1985).
    [CrossRef]
  32. H. M. Ozaktas, Y. Amitai, J. W. Goodman, “Comparison of system size for some optical interconnection architectures and the folded multifacet architecture,” Opt. Commun. 82, 225–228 (1991).
    [CrossRef]
  33. H. M. Ozaktas, J. W. Goodman, “Implications of interconnection theory for optical digital computing,” Appl. Opt. 31, 5559–5567 (1992).
    [CrossRef] [PubMed]

1992 (4)

H. M. Ozaktas, “Paradigms of connectivity for computer circuits and networks,” Opt. Eng. 31, 1563–1567 (1992).
[CrossRef]

H. M. Ozaktas, H. Oksuzoglu, R. F. W. Pease, J. W. Goodman, “Effect on scaling of heat removal requirements in three-dimensional systems,” Int. J. Electron. 73, 1227–1232 (1992).
[CrossRef]

A. V. Krishnamoorthy, P. J. Marchand, F. E. Kiamilev, S. C. Esener, “Grain-size considerations for optoelectronic multistage interconnection networks, Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

H. M. Ozaktas, J. W. Goodman, “Implications of interconnection theory for optical digital computing,” Appl. Opt. 31, 5559–5567 (1992).
[CrossRef] [PubMed]

1991 (3)

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “Comparison of system size for some optical interconnection architectures and the folded multifacet architecture,” Opt. Commun. 82, 225–228 (1991).
[CrossRef]

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “A three-dimensional optical interconnection architecture with minimal growth rate of system size,” Opt. Commun. 85, 1–4 (1991).
[CrossRef]

F. E. Kiamilev, P. Marchand, A. V. Krishnamoorthy, S. C. Esener, S. H. Lee, “Performance comparison bewteen optoelectronic and VLSI multistage interconnection networks,” J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

1990 (1)

1989 (5)

1988 (1)

1987 (3)

O. K. Kwon, B. W. Langley, R. F. W. Pease, M. R. Beasley, “Superconductors as very-high-speed system-level interconnects,” IEEE Electron Device Lett. 8, 582–585 (1987).
[CrossRef]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
[CrossRef]

L. D. Hutcheson, P. Haugen, “Optical interconnects replace hardwire,” IEEE Spectrum (March1987), pp. 30–35.

1986 (1)

P. R. Haugen, S. Rychnovsky, A. Husain, L. D. Hutcheson, “Optical interconnects for high-speed computing,” Opt. Eng 25, 1076 (1986).

1985 (2)

H. B. Bakoglu, J. D. Meindl, “Optimal interconnection circuits for VLSI,” IEEE Trans. Electron. Devices 32, 903–909(1985).
[CrossRef]

R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectronic chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
[CrossRef] [PubMed]

1984 (1)

J. W. Goodman, F. J. Leonbergere, S.-Y. Kung, R. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866(1984).
[CrossRef]

1982 (4)

K. C. Saraswat, F. Mohammadi, “Effect of scaling of interconnections on the time delay of VLSI circuits,” IEEE Trans. Electron Devices ED-29, 645–650 (1982).
[CrossRef]

W. D. Hillis, “New computer architectures and their relationship to physics or why computer science is no good,” Int. J. Theor. Phys. 21, 255–262 (1982).
[CrossRef]

R. W. Keyes, “Communication in computation,” Int. J. Theor. Phys. 21, 263–273 (1982).
[CrossRef]

M. Feuer, “Connectivity of random logic,” IEEE Trans. Comput. C-31, 29–33 (1982).
[CrossRef]

1981 (2)

A. El Gamal, “Two-dimensional stochastic model for interconnections in master slice integrated circuits,” IEEE Trans. Circuits Syst. CS-28, 127–134 (1981).
[CrossRef]

W. E. Donath, “Wire length distribution for placements of computer logic,” IBM J. Res. Dev. 25, 152–155 (1981).
[CrossRef]

1978 (1)

W. R. Heller, W. F. Mikhail, W. E. Donath, “Prediction of wiring space requirements for LSI,” J. Des. Autom. Fault Tolerant Comput. 2, 117–144 (1978).

Amitai, Y.

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “A three-dimensional optical interconnection architecture with minimal growth rate of system size,” Opt. Commun. 85, 1–4 (1991).
[CrossRef]

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “Comparison of system size for some optical interconnection architectures and the folded multifacet architecture,” Opt. Commun. 82, 225–228 (1991).
[CrossRef]

Athale, R.

J. W. Goodman, F. J. Leonbergere, S.-Y. Kung, R. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866(1984).
[CrossRef]

Bakoglu, H. B.

H. B. Bakoglu, J. D. Meindl, “Optimal interconnection circuits for VLSI,” IEEE Trans. Electron. Devices 32, 903–909(1985).
[CrossRef]

H. B. Bakoglu, Circuits, Interconnections and Packaging for VLSI (Addison-Wesley, Reading, Mass.1990).

Beasley, M. R.

O. K. Kwon, B. W. Langley, R. F. W. Pease, M. R. Beasley, “Superconductors as very-high-speed system-level interconnects,” IEEE Electron Device Lett. 8, 582–585 (1987).
[CrossRef]

Bergman, L. A.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
[CrossRef]

Donath, W. E.

W. E. Donath, “Wire length distribution for placements of computer logic,” IBM J. Res. Dev. 25, 152–155 (1981).
[CrossRef]

W. R. Heller, W. F. Mikhail, W. E. Donath, “Prediction of wiring space requirements for LSI,” J. Des. Autom. Fault Tolerant Comput. 2, 117–144 (1978).

Drabik, T. J.

El Gamal, A.

A. El Gamal, “Two-dimensional stochastic model for interconnections in master slice integrated circuits,” IEEE Trans. Circuits Syst. CS-28, 127–134 (1981).
[CrossRef]

Esener, S. C.

Feldman, M. R.

Feuer, M.

M. Feuer, “Connectivity of random logic,” IEEE Trans. Comput. C-31, 29–33 (1982).
[CrossRef]

Frye, R. C.

R. C. Frye, “Analysis of the trade-offs between conventional and superconducting interconnections,” IEEE Circuits Devices Mag. (May1989), pp. 27–32.
[CrossRef]

Ghoshal, U.

H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
[CrossRef]

Gibson, D.

H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
[CrossRef]

Goodman, J. W.

H. M. Ozaktas, J. W. Goodman, “Implications of interconnection theory for optical digital computing,” Appl. Opt. 31, 5559–5567 (1992).
[CrossRef] [PubMed]

H. M. Ozaktas, H. Oksuzoglu, R. F. W. Pease, J. W. Goodman, “Effect on scaling of heat removal requirements in three-dimensional systems,” Int. J. Electron. 73, 1227–1232 (1992).
[CrossRef]

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “Comparison of system size for some optical interconnection architectures and the folded multifacet architecture,” Opt. Commun. 82, 225–228 (1991).
[CrossRef]

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “A three-dimensional optical interconnection architecture with minimal growth rate of system size,” Opt. Commun. 85, 1–4 (1991).
[CrossRef]

H. M. Ozaktas, J. W. Goodman, “Lower bound for the communication volume required for an optically interconnected array of points,” J. Opt. Soc. Am. A 7, 2100–2106 (1990).
[CrossRef]

R. K. Kostuk, J. W. Goodman, L. Hesselink, “Optical imaging applied to microelectronic chip-to-chip interconnections,” Appl. Opt. 24, 2851–2858 (1985).
[CrossRef] [PubMed]

J. W. Goodman, F. J. Leonbergere, S.-Y. Kung, R. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866(1984).
[CrossRef]

H. M. Ozaktas, J. W. Goodman, “Optimal partitioning of very-large-scale optoelectronic computing systems,” in Annual Meeting, Vol. 15 of 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), p. 87.

H. M. Ozaktas, J. W. Goodman, “The limitations of interconnections in providing communication between an array of points,” in Frontiers of Computing Systems Research, S. K. Tewksbury, ed. (Plenum, New York, 1991), Vol. 2, pp. 61–130.
[CrossRef]

Guest, C. C.

Haugen, P.

L. D. Hutcheson, P. Haugen, “Optical interconnects replace hardwire,” IEEE Spectrum (March1987), pp. 30–35.

Haugen, P. R.

P. R. Haugen, S. Rychnovsky, A. Husain, L. D. Hutcheson, “Optical interconnects for high-speed computing,” Opt. Eng 25, 1076 (1986).

Heller, W. R.

W. R. Heller, W. F. Mikhail, W. E. Donath, “Prediction of wiring space requirements for LSI,” J. Des. Autom. Fault Tolerant Comput. 2, 117–144 (1978).

Hesselink, L.

Hilbert, C.

H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
[CrossRef]

Hillis, W. D.

W. D. Hillis, “New computer architectures and their relationship to physics or why computer science is no good,” Int. J. Theor. Phys. 21, 255–262 (1982).
[CrossRef]

Husain, A.

P. R. Haugen, S. Rychnovsky, A. Husain, L. D. Hutcheson, “Optical interconnects for high-speed computing,” Opt. Eng 25, 1076 (1986).

Hutcheson, L. D.

L. D. Hutcheson, P. Haugen, “Optical interconnects replace hardwire,” IEEE Spectrum (March1987), pp. 30–35.

P. R. Haugen, S. Rychnovsky, A. Husain, L. D. Hutcheson, “Optical interconnects for high-speed computing,” Opt. Eng 25, 1076 (1986).

Johnston, A. R.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
[CrossRef]

Keyes, R. W.

R. W. Keyes, “Communication in computation,” Int. J. Theor. Phys. 21, 263–273 (1982).
[CrossRef]

Kiamilev, F. E.

A. V. Krishnamoorthy, P. J. Marchand, F. E. Kiamilev, S. C. Esener, “Grain-size considerations for optoelectronic multistage interconnection networks, Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. E. Kiamilev, P. Marchand, A. V. Krishnamoorthy, S. C. Esener, S. H. Lee, “Performance comparison bewteen optoelectronic and VLSI multistage interconnection networks,” J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Kostuk, R. K.

Krishnamoorthy, A. V.

A. V. Krishnamoorthy, P. J. Marchand, F. E. Kiamilev, S. C. Esener, “Grain-size considerations for optoelectronic multistage interconnection networks, Appl. Opt. 31, 5480–5507 (1992).
[CrossRef] [PubMed]

F. E. Kiamilev, P. Marchand, A. V. Krishnamoorthy, S. C. Esener, S. H. Lee, “Performance comparison bewteen optoelectronic and VLSI multistage interconnection networks,” J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Kroger, H.

H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
[CrossRef]

Kung, S.-Y.

J. W. Goodman, F. J. Leonbergere, S.-Y. Kung, R. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866(1984).
[CrossRef]

Kwon, O. K.

O. K. Kwon, B. W. Langley, R. F. W. Pease, M. R. Beasley, “Superconductors as very-high-speed system-level interconnects,” IEEE Electron Device Lett. 8, 582–585 (1987).
[CrossRef]

Langley, B. W.

O. K. Kwon, B. W. Langley, R. F. W. Pease, M. R. Beasley, “Superconductors as very-high-speed system-level interconnects,” IEEE Electron Device Lett. 8, 582–585 (1987).
[CrossRef]

Lee, S. H.

F. E. Kiamilev, P. Marchand, A. V. Krishnamoorthy, S. C. Esener, S. H. Lee, “Performance comparison bewteen optoelectronic and VLSI multistage interconnection networks,” J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
[CrossRef]

Leonbergere, F. J.

J. W. Goodman, F. J. Leonbergere, S.-Y. Kung, R. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72, 850–866(1984).
[CrossRef]

Marchand, P.

F. E. Kiamilev, P. Marchand, A. V. Krishnamoorthy, S. C. Esener, S. H. Lee, “Performance comparison bewteen optoelectronic and VLSI multistage interconnection networks,” J. Lightwave Technol. 9, 1674–1692 (1991).
[CrossRef]

Marchand, P. J.

Meindl, J. D.

H. B. Bakoglu, J. D. Meindl, “Optimal interconnection circuits for VLSI,” IEEE Trans. Electron. Devices 32, 903–909(1985).
[CrossRef]

Mikhail, W. F.

W. R. Heller, W. F. Mikhail, W. E. Donath, “Prediction of wiring space requirements for LSI,” J. Des. Autom. Fault Tolerant Comput. 2, 117–144 (1978).

Miller, D. A. B.

Mohammadi, F.

K. C. Saraswat, F. Mohammadi, “Effect of scaling of interconnections on the time delay of VLSI circuits,” IEEE Trans. Electron Devices ED-29, 645–650 (1982).
[CrossRef]

Oksuzoglu, H.

H. M. Ozaktas, H. Oksuzoglu, R. F. W. Pease, J. W. Goodman, “Effect on scaling of heat removal requirements in three-dimensional systems,” Int. J. Electron. 73, 1227–1232 (1992).
[CrossRef]

Ozaktas, H. M.

H. M. Ozaktas, H. Oksuzoglu, R. F. W. Pease, J. W. Goodman, “Effect on scaling of heat removal requirements in three-dimensional systems,” Int. J. Electron. 73, 1227–1232 (1992).
[CrossRef]

H. M. Ozaktas, “Paradigms of connectivity for computer circuits and networks,” Opt. Eng. 31, 1563–1567 (1992).
[CrossRef]

H. M. Ozaktas, J. W. Goodman, “Implications of interconnection theory for optical digital computing,” Appl. Opt. 31, 5559–5567 (1992).
[CrossRef] [PubMed]

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “Comparison of system size for some optical interconnection architectures and the folded multifacet architecture,” Opt. Commun. 82, 225–228 (1991).
[CrossRef]

H. M. Ozaktas, Y. Amitai, J. W. Goodman, “A three-dimensional optical interconnection architecture with minimal growth rate of system size,” Opt. Commun. 85, 1–4 (1991).
[CrossRef]

H. M. Ozaktas, J. W. Goodman, “Lower bound for the communication volume required for an optically interconnected array of points,” J. Opt. Soc. Am. A 7, 2100–2106 (1990).
[CrossRef]

H. M. Ozaktas, J. W. Goodman, “Optimal partitioning of very-large-scale optoelectronic computing systems,” in Annual Meeting, Vol. 15 of 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), p. 87.

H. M. Ozaktas, J. W. Goodman, “The limitations of interconnections in providing communication between an array of points,” in Frontiers of Computing Systems Research, S. K. Tewksbury, ed. (Plenum, New York, 1991), Vol. 2, pp. 61–130.
[CrossRef]

H. M. Ozaktas, “A physical approach to communication limits in computation,” Ph.D. dissertation (Stanford University, Stanford, Calif., 1991).

Pease, R. F. W.

H. M. Ozaktas, H. Oksuzoglu, R. F. W. Pease, J. W. Goodman, “Effect on scaling of heat removal requirements in three-dimensional systems,” Int. J. Electron. 73, 1227–1232 (1992).
[CrossRef]

O. K. Kwon, B. W. Langley, R. F. W. Pease, M. R. Beasley, “Superconductors as very-high-speed system-level interconnects,” IEEE Electron Device Lett. 8, 582–585 (1987).
[CrossRef]

Psaltis, D.

C. W. Stirk, D. Psaltis, “Comparison of optical and electronic three-dimensional circuits,” in Microelectronic Interconnects and Packaging, G. Arijavalingam, J. Pazaris, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1389, 580–593 (1990).

Rychnovsky, S.

P. R. Haugen, S. Rychnovsky, A. Husain, L. D. Hutcheson, “Optical interconnects for high-speed computing,” Opt. Eng 25, 1076 (1986).

Saraswat, K. C.

K. C. Saraswat, F. Mohammadi, “Effect of scaling of interconnections on the time delay of VLSI circuits,” IEEE Trans. Electron Devices ED-29, 645–650 (1982).
[CrossRef]

Smith, L.

H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
[CrossRef]

Stirk, C. W.

C. W. Stirk, D. Psaltis, “Comparison of optical and electronic three-dimensional circuits,” in Microelectronic Interconnects and Packaging, G. Arijavalingam, J. Pazaris, eds., Proc. Soc. Photo-Opt. Instrum. Eng.1389, 580–593 (1990).

Wu, W. H.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
[CrossRef]

Yu, P. K. L.

W. H. Wu, L. A. Bergman, A. R. Johnston, C. C. Guest, S. C. Esener, P. K. L. Yu, M. R. Feldman, S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron Devices ED-34, 706–714 (1987).
[CrossRef]

Appl. Opt. (6)

IBM J. Res. Dev. (1)

W. E. Donath, “Wire length distribution for placements of computer logic,” IBM J. Res. Dev. 25, 152–155 (1981).
[CrossRef]

IEEE Circuits Devices Mag (1)

H. Kroger, C. Hilbert, U. Ghoshal, D. Gibson, L. Smith, “Applications of superconductivity to packaging,” IEEE Circuits Devices Mag. (May1989), pp. 16–21.
[CrossRef]

IEEE Circuits Devices Mag. (1)

R. C. Frye, “Analysis of the trade-offs between conventional and superconducting interconnections,” IEEE Circuits Devices Mag. (May1989), pp. 27–32.
[CrossRef]

IEEE Electron Device Lett (1)

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[CrossRef]

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L. D. Hutcheson, P. Haugen, “Optical interconnects replace hardwire,” IEEE Spectrum (March1987), pp. 30–35.

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Figures (17)

Fig. 1
Fig. 1

Partitioning a system of N elements into N/N1 groups of N1 elements each (N/N1 = 9).

Fig. 2
Fig. 2

Layout of the connection graph.

Fig. 3
Fig. 3

Binary hierarchical partitioning of the array of cells. A group at the ith level has N′ = N/4 i cells.

Fig. 4
Fig. 4

Analysis of optimal hybrid layouts (N1 = 4).

Fig. 5
Fig. 5

N1 versus N: p = 0.6, f = 2, E o = 1 pJ. The plots for the two lower values of B coincide.

Fig. 6
Fig. 6

S versus N: B = 100 Mbits/s, p = 0.6, f = 2, E o = 1 pJ. The plot for the optimal hybrid case first coincides with that for the all-electrical case and then with that for the all-optical case.

Fig. 7
Fig. 7

versus N: B = 100 Mbits/s, p = 0.6, f = 2, E o = 1 pJ. The plots for the all-optical and the optimal hybrid cases coincide for larger N.

Fig. 8
Fig. 8

N1 versus N:p 0.6, f = 50, E o = 1 pJ. All plots coincide for the smallest and the largest values of N.

Fig. 9
Fig. 9

S versus N: B = 100 Mbits/s, p = 0.6, f = 50, E o = 1 pJ. The plot for the optimal hybrid case first coincides with that for the all-electrical case and then with that for the all-optical case.

Fig. 10
Fig. 10

N1 versus N: p = 0.6, f = 2, E o = 100 pJ.

Fig. 11
Fig. 11

versus N: B = 100 Mbits/s, p = 0.6, f = 2, E o = l00 pJ.

Fig. 12
Fig. 12

N1 versus N: p = 0.8, f = 2, E o = 100 pJ.

Fig. 13
Fig. 13

N1 versus N (cost-based optimization): p = 0.6, f = 2, E o = 1 pJ.

Fig. 14
Fig. 14

N1 versus N (repeaters): p = 0.6 or p = 0.8, f = 50, E o = 1 pJ. The plots for all values of B coincide.

Fig. 15
Fig. 15

N1 versus N (three dimensions): p = 0.6, E o = 1 pJ.

Fig. 16
Fig. 16

S versus N (three dimensions): B = 100 Mbits/s, p = 0.6, E o = 1 pJ. Repeaters are assumed for the all-electrical case.

Fig. 17
Fig. 17

S versus N(three dimensions): B = 100 Mbits/s, p = 0.8, E o = 1 pJ. Repeaters are assumed for the all-electrical case.

Tables (1)

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Table 1 List of Symbols

Equations (30)

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g ( r ) = k e ( 1 - p ) r e ( p - 1 ) - 1 ,             1 r r max ,
r ¯ κ ( p , e ) N p - ( e - 1 ) / e ,
κ ( p , e ) = e ( 1 - p ) 1 - e ( 1 - p ) ,
L = max ( N 1 / 2 d d , k κ N p W / M ) .
L = max [ N 1 / 3 d d , ( k κ N p ) 1 / 2 W ] .
P ( N ) = k N p .
τ = max / c = L / c = k κ N p f λ / c ,
τ = max / c = L / c = ( k N E o B / Q ) 1 / 2 / c .
τ R C = α 2 W 2 ,
E n = γ ,
τ = α max 2 / W 2 = α ( k κ N p / M ) 2 .
τ rep = β W ,
τ = β max / W = β ( k κ N p / M ) .
Γ = S P ,             0.
N 1 ( M / k κ ) 1 / p ( 1 / α B ) 1 / 2 p .
d 1 max [ N 1 1 / 2 d d , k κ N 1 p W min / M , ( k N 1 p ) 1 / 2 d tr , k N 1 p ( f λ ) ] .
Q d 1 2 ( electrical dissipation plus optical dissipation ) .
d 1 max [ ( k N 1 p E o B Q ) 1 / 2 , γ k κ N 1 p B Q ] .
d 1 = max [ k N 1 p ( f λ ) ,     ( k N 1 p E o B Q ) 1 / 2 , γ k κ N 1 p B Q ] .
d m = max [ d 1 , k κ N 1 p ( N / N 1 ) p - 1 / 2 ( f λ ) ] ,
τ = max [ ( N / N 1 ) 1 / 2 d m / c , α ( k κ / M ) 2 N 1 2 p , T d ) .
τ = max [ k κ N p ( f λ / c ) , ( N / N 1 ) 1 / 2 ( k N 1 p E o B / c 2 Q ) 1 / 2 , ( N / N 1 ) 1 / 2 ( γ k κ / N 1 p B / c Q ) , α ( k κ / M ) 2 N 1 2 p , T d ]
P = ( N / N 1 ) ( k N 1 p E o + γ k κ N 1 p d 1 ) B ( N / N 1 ) max ( k N 1 p E o , γ k κ N 1 p d 1 ) B .
N 1 p = E o γ ( f λ ) k κ .
N 1 p = k E o Q ( γ k κ ) 2 B .
N 1 ( f λ / c α M 2 k κ ) 1 / 2 p N 1 / 2 .
Γ = S L 2 P .
τ = max [ ( N / N 1 ) 1 / 2 d m / c , β ( k κ / M ) N 1 p , T d ] .
τ = max [ ( N / N 1 ) 1 / 2 d m / c , T d ] .
L = N 1 / 2 ( k B / Q ) 1 / 2 p E o 1 - 1 / 2 p ( κ γ ) 1 / p - 1 ,

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