Abstract

A nonblocking crossbar network that employs free-space optical interconnections between optoelectronic switching nodes is proposed. The architecture can be implemented using standard electronic technologies for the switching logic, systematic self-electro-optic effect devices for modulators and detectors, and fairly simple optics to connect adjacent chips in the network. Since optical interconnections are only required between adjacent chips, this architecture may have advantages compared with other architectures that have been proposed using optical interconnections between electronic chips. In addition, a simple routing scheme is discussed that permits the optical crossbar network to be operated as a self-routing packet switch. This packet switch provides for contention resolution, priority routing, and automatic increases in the priority of blocked packets. An example illustrating one implementation of the network is then described and analyzed.

© 1991 Optical Society of America

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References

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  1. A. Dickinson, M. E. Prise, “A free-space optical interconnection scheme,” in Optical Computing, Vol. 9 of OSA 1989 Technical Digest Series (Optical Society of America, Washington, D.C., 1989), pp. 132–135.
  2. C. Neugebauer, R. O. Carlson, R. A. Fillion, T. R. Haller, “Multichip module designs for high performance applications,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 46–52.
  3. R. A. Linke, “A proposed optical interconnection technique employing a two-dimensional waveguide as a broadcast medium,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 119–122.
  4. J. Jahns, M. J. Murdocca, “Crossover networks and their optical implementation,” Appl. Opt. 27, 3155–3160 (1988).
    [CrossRef] [PubMed]
  5. H. S. Stone, “Parallel processing with the perfect shuffle,” IEEE Trans. Comput. C-20, 153–161 (1971).
    [CrossRef]
  6. D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
    [CrossRef]
  7. L. L. Goke, A. Lipovski, “Banyan networks for partitioning multiprocessing systems,” in Proceedings, First Annual Computer, Architecture Conference (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1973).
  8. D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
    [CrossRef]
  9. K. E. Batcher, “The flip network in STARAN,” in Proceedings, 1976 International Conference on Parallel Processing (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1976).
  10. H. J. Siegel, “Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks,” IEEE Trans. Comput. C-26, 153–163 (1977).
    [CrossRef]
  11. M. C. Pease, “The indirect binary n-cube microprocessor array,” IEEE Trans. Comput. C-26, 458–473 (1977).
    [CrossRef]
  12. H. S. Hinton, “A nonblocking optical interconnection network using directional couplers,” in Proceedings of the IEEE Globecom (Institute of Electrical and Electronics Engineers, 1984), pp. 885–890.
  13. H. S. Hinton, “Photonic switching using directional couplers,” IEEE Trans. Commun. COM-25 (5), 16–26 (1987).
  14. A. Huang, S. Kanuer, “Starlite: a wideband digital switch,” in GlobeCom '84, IEEE 84CH2064-4 (Institute of Electrical and Electronics Engineers1984), Vol. 1, p. 121.
  15. T.-Y. Feng, “A survey of interconnection networks,” Computer12–27 (December1981).
    [CrossRef]
  16. M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
    [CrossRef] [PubMed]
  17. J. E. Midwinter, “Photonic switching technology: component characteristics versus network requirements,” IEEE J. Lightwave Technol. LT-6, 1512–1519 (1988).
    [CrossRef]
  18. J. W. Goodman, “Optics as an interconnect technology,” in Optical Processing and Computing, H. H. Arsenault, T. Szoplik, B. Macukow, eds. (Academic, New York, 1989), pp. 1–32.
  19. J. E. Midwinter, “Digital optics, smart interconnect or optical logic? (part 1),” in Photonic Switching, H. S. Hinton, J. E. Midwinter, eds. (Institute of Electrical and Electronics Engineers, New York, 1990), pp. 24–31.
  20. M. Farhadiroushan, D. R. Selviah, J. E. Midwinter, “Asymmetric Fabry-Perot multiple quantum well PIN diodes and S-SEEDs for intrachip interconnections,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 187–190.
  21. R. R. Tummala, “Ceramic packaging,” in Microelectronics Packaging Handbook, R. R. Tummala, E. J. Rymaszewski, eds. (Van Nostrand Reinhold, New York, 1989), pp. 455–522.
    [CrossRef]
  22. V. K. Nagesh, D. Miller, L. Moresco, “A comparative study of interconnect technologies,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 557–566.
  23. J. E. Midwinter, “Digital optics, smart interconnect or optical logic? (part 2),” in Photonic Switching, H. S. Hinton, J. E. Midwinter, Eds. (IEEE, New York, 1990), pp. 32–37.
  24. A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
    [CrossRef]
  25. F. Kiamilev et al., “Programmable optoelectronic multiprocessors and their comparison with symbolic substitution for digital optical computing,” Opt. Eng. 28, 396–409 (1989).
  26. F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

1989 (1)

F. Kiamilev et al., “Programmable optoelectronic multiprocessors and their comparison with symbolic substitution for digital optical computing,” Opt. Eng. 28, 396–409 (1989).

1988 (4)

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

J. Jahns, M. J. Murdocca, “Crossover networks and their optical implementation,” Appl. Opt. 27, 3155–3160 (1988).
[CrossRef] [PubMed]

J. E. Midwinter, “Photonic switching technology: component characteristics versus network requirements,” IEEE J. Lightwave Technol. LT-6, 1512–1519 (1988).
[CrossRef]

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

1987 (1)

H. S. Hinton, “Photonic switching using directional couplers,” IEEE Trans. Commun. COM-25 (5), 16–26 (1987).

1981 (1)

T.-Y. Feng, “A survey of interconnection networks,” Computer12–27 (December1981).
[CrossRef]

1977 (2)

H. J. Siegel, “Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks,” IEEE Trans. Comput. C-26, 153–163 (1977).
[CrossRef]

M. C. Pease, “The indirect binary n-cube microprocessor array,” IEEE Trans. Comput. C-26, 458–473 (1977).
[CrossRef]

1975 (2)

D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
[CrossRef]

D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
[CrossRef]

1971 (1)

H. S. Stone, “Parallel processing with the perfect shuffle,” IEEE Trans. Comput. C-20, 153–161 (1971).
[CrossRef]

Batcher, K. E.

K. E. Batcher, “The flip network in STARAN,” in Proceedings, 1976 International Conference on Parallel Processing (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1976).

Carlson, R. O.

C. Neugebauer, R. O. Carlson, R. A. Fillion, T. R. Haller, “Multichip module designs for high performance applications,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 46–52.

Chirovsky, L. M. F.

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

Cunningham, J. E.

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

Dickinson, A.

A. Dickinson, M. E. Prise, “A free-space optical interconnection scheme,” in Optical Computing, Vol. 9 of OSA 1989 Technical Digest Series (Optical Society of America, Washington, D.C., 1989), pp. 132–135.

Esener, S. C.

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

Farhadiroushan, M.

M. Farhadiroushan, D. R. Selviah, J. E. Midwinter, “Asymmetric Fabry-Perot multiple quantum well PIN diodes and S-SEEDs for intrachip interconnections,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 187–190.

Feldman, M. R.

Feng, T.-Y.

T.-Y. Feng, “A survey of interconnection networks,” Computer12–27 (December1981).
[CrossRef]

Fillion, R. A.

C. Neugebauer, R. O. Carlson, R. A. Fillion, T. R. Haller, “Multichip module designs for high performance applications,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 46–52.

Goke, L. L.

L. L. Goke, A. Lipovski, “Banyan networks for partitioning multiprocessing systems,” in Proceedings, First Annual Computer, Architecture Conference (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1973).

Goodman, J. W.

J. W. Goodman, “Optics as an interconnect technology,” in Optical Processing and Computing, H. H. Arsenault, T. Szoplik, B. Macukow, eds. (Academic, New York, 1989), pp. 1–32.

Guest, C. C.

Haller, T. R.

C. Neugebauer, R. O. Carlson, R. A. Fillion, T. R. Haller, “Multichip module designs for high performance applications,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 46–52.

Henry, J. E.

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

Hinton, H. S.

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

H. S. Hinton, “Photonic switching using directional couplers,” IEEE Trans. Commun. COM-25 (5), 16–26 (1987).

H. S. Hinton, “A nonblocking optical interconnection network using directional couplers,” in Proceedings of the IEEE Globecom (Institute of Electrical and Electronics Engineers, 1984), pp. 885–890.

Huang, A.

A. Huang, S. Kanuer, “Starlite: a wideband digital switch,” in GlobeCom '84, IEEE 84CH2064-4 (Institute of Electrical and Electronics Engineers1984), Vol. 1, p. 121.

Jahns, J.

Kanuer, S.

A. Huang, S. Kanuer, “Starlite: a wideband digital switch,” in GlobeCom '84, IEEE 84CH2064-4 (Institute of Electrical and Electronics Engineers1984), Vol. 1, p. 121.

Kiamilev, F.

F. Kiamilev et al., “Programmable optoelectronic multiprocessors and their comparison with symbolic substitution for digital optical computing,” Opt. Eng. 28, 396–409 (1989).

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

Krishnamoorthy, A.

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

Lawrie, D. K.

D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
[CrossRef]

D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
[CrossRef]

Lee, S. H.

M. R. Feldman, S. C. Esener, C. C. Guest, S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742–1751 (1988).
[CrossRef] [PubMed]

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

Lentine, A. L.

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

Linke, R. A.

R. A. Linke, “A proposed optical interconnection technique employing a two-dimensional waveguide as a broadcast medium,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 119–122.

Lipovski, A.

L. L. Goke, A. Lipovski, “Banyan networks for partitioning multiprocessing systems,” in Proceedings, First Annual Computer, Architecture Conference (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1973).

Marchand, P.

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

Midwinter, J. E.

J. E. Midwinter, “Photonic switching technology: component characteristics versus network requirements,” IEEE J. Lightwave Technol. LT-6, 1512–1519 (1988).
[CrossRef]

J. E. Midwinter, “Digital optics, smart interconnect or optical logic? (part 1),” in Photonic Switching, H. S. Hinton, J. E. Midwinter, eds. (Institute of Electrical and Electronics Engineers, New York, 1990), pp. 24–31.

J. E. Midwinter, “Digital optics, smart interconnect or optical logic? (part 2),” in Photonic Switching, H. S. Hinton, J. E. Midwinter, Eds. (IEEE, New York, 1990), pp. 32–37.

M. Farhadiroushan, D. R. Selviah, J. E. Midwinter, “Asymmetric Fabry-Perot multiple quantum well PIN diodes and S-SEEDs for intrachip interconnections,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 187–190.

Miller, D.

V. K. Nagesh, D. Miller, L. Moresco, “A comparative study of interconnect technologies,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 557–566.

Miller, D. A. B.

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

Moresco, L.

V. K. Nagesh, D. Miller, L. Moresco, “A comparative study of interconnect technologies,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 557–566.

Murdocca, M. J.

Nagesh, V. K.

V. K. Nagesh, D. Miller, L. Moresco, “A comparative study of interconnect technologies,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 557–566.

Neugebauer, C.

C. Neugebauer, R. O. Carlson, R. A. Fillion, T. R. Haller, “Multichip module designs for high performance applications,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 46–52.

Pease, M. C.

M. C. Pease, “The indirect binary n-cube microprocessor array,” IEEE Trans. Comput. C-26, 458–473 (1977).
[CrossRef]

Prise, M. E.

A. Dickinson, M. E. Prise, “A free-space optical interconnection scheme,” in Optical Computing, Vol. 9 of OSA 1989 Technical Digest Series (Optical Society of America, Washington, D.C., 1989), pp. 132–135.

Selviah, D. R.

M. Farhadiroushan, D. R. Selviah, J. E. Midwinter, “Asymmetric Fabry-Perot multiple quantum well PIN diodes and S-SEEDs for intrachip interconnections,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 187–190.

Siegel, H. J.

H. J. Siegel, “Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks,” IEEE Trans. Comput. C-26, 153–163 (1977).
[CrossRef]

Stone, H. S.

H. S. Stone, “Parallel processing with the perfect shuffle,” IEEE Trans. Comput. C-20, 153–161 (1971).
[CrossRef]

Tummala, R. R.

R. R. Tummala, “Ceramic packaging,” in Microelectronics Packaging Handbook, R. R. Tummala, E. J. Rymaszewski, eds. (Van Nostrand Reinhold, New York, 1989), pp. 455–522.
[CrossRef]

Urquhart, K. S.

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

Appl. Opt. (2)

Computer (1)

T.-Y. Feng, “A survey of interconnection networks,” Computer12–27 (December1981).
[CrossRef]

IEEE J. Lightwave Technol. (1)

J. E. Midwinter, “Photonic switching technology: component characteristics versus network requirements,” IEEE J. Lightwave Technol. LT-6, 1512–1519 (1988).
[CrossRef]

IEEE J. Quantum Electron. (1)

A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, L. M. F. Chirovsky, “Symmetric self-electrooptic effect device: optical set–reset latch, differential logic gate, and differential modulator/detector,” IEEE J. Quantum Electron. 25, 1928–1936 (1988).
[CrossRef]

IEEE Trans. Commun. (1)

H. S. Hinton, “Photonic switching using directional couplers,” IEEE Trans. Commun. COM-25 (5), 16–26 (1987).

IEEE Trans. Comput. (5)

H. J. Siegel, “Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks,” IEEE Trans. Comput. C-26, 153–163 (1977).
[CrossRef]

M. C. Pease, “The indirect binary n-cube microprocessor array,” IEEE Trans. Comput. C-26, 458–473 (1977).
[CrossRef]

H. S. Stone, “Parallel processing with the perfect shuffle,” IEEE Trans. Comput. C-20, 153–161 (1971).
[CrossRef]

D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
[CrossRef]

D. K. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Comput. C-24, 1145–1155 (1975).
[CrossRef]

Opt. Eng. (1)

F. Kiamilev et al., “Programmable optoelectronic multiprocessors and their comparison with symbolic substitution for digital optical computing,” Opt. Eng. 28, 396–409 (1989).

Other (14)

F. Kiamilev, A. Krishnamoorthy, K. S. Urquhart, P. Marchand, S. C. Esener, S. H. Lee, “Grain-size considerations for programmable optoelectronic multiprocessor interconnection networks,” in Vol. X of OSA 1990 Technical Digest Series (Optical Society of America, Washington, D.C., 1990), paper TuJJ5.

A. Dickinson, M. E. Prise, “A free-space optical interconnection scheme,” in Optical Computing, Vol. 9 of OSA 1989 Technical Digest Series (Optical Society of America, Washington, D.C., 1989), pp. 132–135.

C. Neugebauer, R. O. Carlson, R. A. Fillion, T. R. Haller, “Multichip module designs for high performance applications,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 46–52.

R. A. Linke, “A proposed optical interconnection technique employing a two-dimensional waveguide as a broadcast medium,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 119–122.

K. E. Batcher, “The flip network in STARAN,” in Proceedings, 1976 International Conference on Parallel Processing (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1976).

L. L. Goke, A. Lipovski, “Banyan networks for partitioning multiprocessing systems,” in Proceedings, First Annual Computer, Architecture Conference (Institute of Electrical and Electronics Engineers, Piscataway, N.J., 1973).

H. S. Hinton, “A nonblocking optical interconnection network using directional couplers,” in Proceedings of the IEEE Globecom (Institute of Electrical and Electronics Engineers, 1984), pp. 885–890.

A. Huang, S. Kanuer, “Starlite: a wideband digital switch,” in GlobeCom '84, IEEE 84CH2064-4 (Institute of Electrical and Electronics Engineers1984), Vol. 1, p. 121.

J. W. Goodman, “Optics as an interconnect technology,” in Optical Processing and Computing, H. H. Arsenault, T. Szoplik, B. Macukow, eds. (Academic, New York, 1989), pp. 1–32.

J. E. Midwinter, “Digital optics, smart interconnect or optical logic? (part 1),” in Photonic Switching, H. S. Hinton, J. E. Midwinter, eds. (Institute of Electrical and Electronics Engineers, New York, 1990), pp. 24–31.

M. Farhadiroushan, D. R. Selviah, J. E. Midwinter, “Asymmetric Fabry-Perot multiple quantum well PIN diodes and S-SEEDs for intrachip interconnections,” in Photonic Switching, OSA 1991 Technical Digest Series (Optical Society of America, Washington, D.C., 1991), pp. 187–190.

R. R. Tummala, “Ceramic packaging,” in Microelectronics Packaging Handbook, R. R. Tummala, E. J. Rymaszewski, eds. (Van Nostrand Reinhold, New York, 1989), pp. 455–522.
[CrossRef]

V. K. Nagesh, D. Miller, L. Moresco, “A comparative study of interconnect technologies,” in Multichip Modules: System Advantages, Major Constructions, and Materials Technology, W. Johnson, R. K. F. Teng, J. W. Balde, eds. (Institute of Electrical and Electronics Engineers, New York, 1991), pp. 557–566.

J. E. Midwinter, “Digital optics, smart interconnect or optical logic? (part 2),” in Photonic Switching, H. S. Hinton, J. E. Midwinter, Eds. (IEEE, New York, 1990), pp. 32–37.

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Figures (17)

Fig. 1
Fig. 1

Fully connected crossover network.

Fig. 2
Fig. 2

Basic crossbar network topology.

Fig. 3
Fig. 3

Alternative crossbar network topology.

Fig. 4
Fig. 4

Two permissible configurations for two-by-two cross points.

Fig. 5
Fig. 5

Convenient packet format.

Fig. 6
Fig. 6

Logic within a node.

Fig. 7
Fig. 7

Signal timing within a node (assuming M = 4 output ports).

Fig. 8
Fig. 8

Packet routing in a crossbar network.

Fig. 9
Fig. 9

Contention resolution in crossbar network.

Fig. 10
Fig. 10

Recirculation of trapped packets in a crossbar network.

Fig. 11
Fig. 11

Fundamental 32 × 32 island for a self-routing crossbar network.

Fig. 12
Fig. 12

A 64 × 64 crossbar switch constructed from four 32 × 32 islands.

Fig. 13
Fig. 13

A 32 × 32 switch/modulator/detector MCM island.

Fig. 14
Fig. 14

Optical hardware for modulator-to-detector interconnections.

Fig. 15
Fig. 15

A 64 × 64 crossbar switch constructed from four 32 × 32 MCM islands.

Fig. 16
Fig. 16

Optical hardware for bidirectional modulator-to-detector interconnections.

Fig. 17
Fig. 17

A 64 × 64 crossbar switch constructed from four 32 × 32 MCM islands with daisy-chain feedback paths.

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