Abstract

We report in this paper the use of Si/PLZT technology in the fabrication of 2-D electrically and optically addressed spatial light modulators. First, a 12 × 12 electrically matrix addressed array was fabricated using simultaneous laser assisted diffusion and crystallization. Then, NMOS transistors exhibiting electron mobility of 550 cm2/V-s were fabricated in each unit cell of the matrix array and used to control the PLZT modulator. A dynamic range of 35:1 was achieved. A 16 × 16 optically addressed SLM array was also fabricated. In this case, to improve the optical sensitivity, a three-transistor CMOS detector-amplifier circuit was included in each unit cell of the array.

© 1990 Optical Society of America

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References

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  1. A. R. Tanguay, “Material Requirements for Optical Processing and Computing Devices,” Opt. Eng. 24, 2–18 (1985).
  2. A. R. Tanguay, C. Warde, Eds. “Optical Information Processing Components,” in Opt. Eng.24, 91–149 (1985); C. Warde, U. Efron Eds., “Optical Information Processing Systems, Materials and Devices,” Opt. Eng.26, 367–460 (1987).
  3. C. Warde, A. Fisher, “Spatial Light Modulators: Applications and Functional Capabilities,” Optical Signal Processing, J. L. Horner Ed. (Academic Press, New York, 1987), pp. 478–515.
  4. S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
    [CrossRef]
  5. J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
    [CrossRef]
  6. S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
    [CrossRef]
  7. R. Athale, S. H. Lee, S. Esener, “A Spatially Segmented Design Approach to Spatial Light Modulators,” in Technical Digest, Topical Meeting on Spatial Light Modulators (Optical Society of America, Washington, DC, 1988), p. 132.
  8. S. C. Esener, S. H. Lee, “Punch-Through Current Under Diffusion-Limited Injection: Analysis and Application,” J. Appl. Phys. 58, 1380–1387 (1985).
    [CrossRef]
  9. S. C. Esener, “Silicon device development for silicon/PLZT spatial light modulators,” Ph.D. Dissertation, U. of California, San Diego (1987), p. 82.
  10. T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
    [CrossRef]
  11. J. P. Colinge, E. Demoulin, M. Lobet, “Stacked Transistors CMOS (ST-CMOS) and NMOS Technology Modified to CMOS,” IEEE Trans. Electron. Devices ED-29, 585–589 (1982).
    [CrossRef]
  12. S. Dasgupta, H. E. Jackson, J. T. Boyd, “Two Beam Recrystallization of Polysilicon on Insulator,” J. Appl. Phys. 64, 2069–2075 (1988).
    [CrossRef]
  13. H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
    [CrossRef]
  14. S. M. Sze, Physics of Semiconductor Devices (Wiley, New York, 1981), p. 743.

1988 (2)

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

S. Dasgupta, H. E. Jackson, J. T. Boyd, “Two Beam Recrystallization of Polysilicon on Insulator,” J. Appl. Phys. 64, 2069–2075 (1988).
[CrossRef]

1987 (2)

T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
[CrossRef]

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

1986 (2)

S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
[CrossRef]

H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
[CrossRef]

1985 (2)

A. R. Tanguay, “Material Requirements for Optical Processing and Computing Devices,” Opt. Eng. 24, 2–18 (1985).

S. C. Esener, S. H. Lee, “Punch-Through Current Under Diffusion-Limited Injection: Analysis and Application,” J. Appl. Phys. 58, 1380–1387 (1985).
[CrossRef]

1982 (1)

J. P. Colinge, E. Demoulin, M. Lobet, “Stacked Transistors CMOS (ST-CMOS) and NMOS Technology Modified to CMOS,” IEEE Trans. Electron. Devices ED-29, 585–589 (1982).
[CrossRef]

Athale, R.

R. Athale, S. H. Lee, S. Esener, “A Spatially Segmented Design Approach to Spatial Light Modulators,” in Technical Digest, Topical Meeting on Spatial Light Modulators (Optical Society of America, Washington, DC, 1988), p. 132.

Boyd, J. T.

S. Dasgupta, H. E. Jackson, J. T. Boyd, “Two Beam Recrystallization of Polysilicon on Insulator,” J. Appl. Phys. 64, 2069–2075 (1988).
[CrossRef]

H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
[CrossRef]

Burgener, M. L.

T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
[CrossRef]

Colinge, J. P.

J. P. Colinge, E. Demoulin, M. Lobet, “Stacked Transistors CMOS (ST-CMOS) and NMOS Technology Modified to CMOS,” IEEE Trans. Electron. Devices ED-29, 585–589 (1982).
[CrossRef]

Dasgupta, S.

S. Dasgupta, H. E. Jackson, J. T. Boyd, “Two Beam Recrystallization of Polysilicon on Insulator,” J. Appl. Phys. 64, 2069–2075 (1988).
[CrossRef]

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

Demoulin, E.

J. P. Colinge, E. Demoulin, M. Lobet, “Stacked Transistors CMOS (ST-CMOS) and NMOS Technology Modified to CMOS,” IEEE Trans. Electron. Devices ED-29, 585–589 (1982).
[CrossRef]

Drabik, T.

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
[CrossRef]

Esener, S.

R. Athale, S. H. Lee, S. Esener, “A Spatially Segmented Design Approach to Spatial Light Modulators,” in Technical Digest, Topical Meeting on Spatial Light Modulators (Optical Society of America, Washington, DC, 1988), p. 132.

Esener, S. C.

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
[CrossRef]

S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
[CrossRef]

S. C. Esener, S. H. Lee, “Punch-Through Current Under Diffusion-Limited Injection: Analysis and Application,” J. Appl. Phys. 58, 1380–1387 (1985).
[CrossRef]

S. C. Esener, “Silicon device development for silicon/PLZT spatial light modulators,” Ph.D. Dissertation, U. of California, San Diego (1987), p. 82.

Fisher, A.

C. Warde, A. Fisher, “Spatial Light Modulators: Applications and Functional Capabilities,” Optical Signal Processing, J. L. Horner Ed. (Academic Press, New York, 1987), pp. 478–515.

Jackson, H. E.

S. Dasgupta, H. E. Jackson, J. T. Boyd, “Two Beam Recrystallization of Polysilicon on Insulator,” J. Appl. Phys. 64, 2069–2075 (1988).
[CrossRef]

H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
[CrossRef]

Janning, J. L.

H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
[CrossRef]

Lee, S. H.

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
[CrossRef]

S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
[CrossRef]

S. C. Esener, S. H. Lee, “Punch-Through Current Under Diffusion-Limited Injection: Analysis and Application,” J. Appl. Phys. 58, 1380–1387 (1985).
[CrossRef]

R. Athale, S. H. Lee, S. Esener, “A Spatially Segmented Design Approach to Spatial Light Modulators,” in Technical Digest, Topical Meeting on Spatial Light Modulators (Optical Society of America, Washington, DC, 1988), p. 132.

Lin, T. H.

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
[CrossRef]

Lobet, M.

J. P. Colinge, E. Demoulin, M. Lobet, “Stacked Transistors CMOS (ST-CMOS) and NMOS Technology Modified to CMOS,” IEEE Trans. Electron. Devices ED-29, 585–589 (1982).
[CrossRef]

Lu, H. L.

H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
[CrossRef]

Sze, S. M.

S. M. Sze, Physics of Semiconductor Devices (Wiley, New York, 1981), p. 743.

Tanguay, A. R.

A. R. Tanguay, “Material Requirements for Optical Processing and Computing Devices,” Opt. Eng. 24, 2–18 (1985).

Title, M.

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
[CrossRef]

Wang, J.

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

Wang, J. H.

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

Warde, C.

C. Warde, A. Fisher, “Spatial Light Modulators: Applications and Functional Capabilities,” Optical Signal Processing, J. L. Horner Ed. (Academic Press, New York, 1987), pp. 478–515.

IEEE Trans. Electron. Devices (1)

J. P. Colinge, E. Demoulin, M. Lobet, “Stacked Transistors CMOS (ST-CMOS) and NMOS Technology Modified to CMOS,” IEEE Trans. Electron. Devices ED-29, 585–589 (1982).
[CrossRef]

J. Appl. Phys. (3)

S. Dasgupta, H. E. Jackson, J. T. Boyd, “Two Beam Recrystallization of Polysilicon on Insulator,” J. Appl. Phys. 64, 2069–2075 (1988).
[CrossRef]

H. L. Lu, J. T. Boyd, H. E. Jackson, J. L. Janning, “Characterization of the Effects of Different Capping Layer Structures on the Laser Recrystallization of Silicon by Using Electrical Test Structures and Raman Spectroscopy,” J. Appl. Phys. 60, 4273–4276 (1986).
[CrossRef]

S. C. Esener, S. H. Lee, “Punch-Through Current Under Diffusion-Limited Injection: Analysis and Application,” J. Appl. Phys. 58, 1380–1387 (1985).
[CrossRef]

Mater. Res. Soc. (1)

T. H. Lin, M. L. Burgener, S. C. Esener, S. H. Lee, “Crystallization of Silicon on Electro-Optic PLZT by a Laser Beam Modulated in Shape and Intensity Profile,” Mater. Res. Soc., Symp. Proc. 74, 135–140 (1987).
[CrossRef]

Mater. Res. Soc. Symp. Proc. (1)

J. H. Wang, T. H. Lin, S. C. Esener, S. Dasgupta, S. H. Lee, “NMOS Transistors Fabricated by Simultaneous Laser Assisted Crystallization and Diffusion on Silicon on Electro-Optic PLZT,” Mater. Res. Soc. Symp. Proc. 100, 675–680 (1988).
[CrossRef]

Opt. Eng. (3)

S. C. Esener, J. Wang, M. Title, T. Drabik, S. H. Lee, “One-dimensional Silicon/PLZT Spatial Light Modulators,” Opt. Eng. 26, 406–413 (1987).
[CrossRef]

A. R. Tanguay, “Material Requirements for Optical Processing and Computing Devices,” Opt. Eng. 24, 2–18 (1985).

S. H. Lee, S. C. Esener, M. Title, T. Drabik, “Two-dimensional Silicon/PLZT Spatial Light Modulators: Design Considerations and Technology,” Opt. Eng. 25, 250–260 (1986).
[CrossRef]

Other (5)

S. C. Esener, “Silicon device development for silicon/PLZT spatial light modulators,” Ph.D. Dissertation, U. of California, San Diego (1987), p. 82.

A. R. Tanguay, C. Warde, Eds. “Optical Information Processing Components,” in Opt. Eng.24, 91–149 (1985); C. Warde, U. Efron Eds., “Optical Information Processing Systems, Materials and Devices,” Opt. Eng.26, 367–460 (1987).

C. Warde, A. Fisher, “Spatial Light Modulators: Applications and Functional Capabilities,” Optical Signal Processing, J. L. Horner Ed. (Academic Press, New York, 1987), pp. 478–515.

R. Athale, S. H. Lee, S. Esener, “A Spatially Segmented Design Approach to Spatial Light Modulators,” in Technical Digest, Topical Meeting on Spatial Light Modulators (Optical Society of America, Washington, DC, 1988), p. 132.

S. M. Sze, Physics of Semiconductor Devices (Wiley, New York, 1981), p. 743.

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Figures (16)

Fig. 1
Fig. 1

Photomicrograph of the 12 × 12 electrically addressed spatial light modulator array fabricated on Si/PLZT. Each row in the array can be separately addressed. When the signal to the individual rows is turned on, the data can be simultaneously processed by all the unit cells in that array.

Fig. 2
Fig. 2

(a) micrograph of two unit cells of the ESLM array placed side by side. The modulator is powered by the NMOS transistor shown in the micrograph. (b) Schematic of the equivalent circuit for an unit cell of the ESLM array. The gate of the NMOS transistor controls the transmission of the electrical input to the PLZT modulator.

Fig. 3
Fig. 3

(a) schematic of the circuit diagram for a unit cell of the 16 × 16 OSLM array. Each cell consists of a FLIC-PTT which acts as a phototransistor, a PLZT modulator and a 5 MΩ load resistance. The optimum bias gate voltage used was −2V. The fabricated unit cell size was 150 × 190 μm. (b) A photomicrograph of a portion of the fabricated 16 × 16 OSLM array. The complete device of the array is 2.4 × 3.04 mm in actual size.

Fig. 4
Fig. 4

(a) Schematic of the circuit diagram of the OSLM array fabricated with additional CMOS circuitry. The unit cell of this array consists of the FLIC-PTT as the phototransistor and a CMOS amplifying feedback circuit which is used to increase the sensitivity of the device. The operation of the circuit is described in the text. (b) A photomicrograph of the fabricated OSLM array with the CMOS amplifier. The transistors and the modulator are labelled on the photograph. The unit cell size for this device is 430 × 430 μm.

Fig. 5
Fig. 5

Plot of the impurity concentration profile as a function of the depth in polysilicon following the laser assisted diffusion and recrystallization process. The concentration profile shows uniform dopant concentration throughout the thickness of recrystallized silicon film.

Fig. 6
Fig. 6

Photomicrograph of a Si/PLZT sample laser recrystallized with antireflection (AR) stripes. The region between the stripes shows recrystallization with the presence of few grain boundaries, whereas the region under the AR stripes contains a large number of grain boundaries. Typical grain sizes obtained were 25 × 120 μm.

Fig. 7
Fig. 7

Raman spectrum of a Si/PLZT sample laser recrystallized using the Ar+ laser. The total number of photocounts is plotted as a function of the position in wavenumbers away from the incident laser wavelength. The incident laser wavelength was 514.5 nm. The peak position in this plot shows that the residual stress in the film is similar to those reported for experiments performed on SOT samples.

Fig. 8
Fig. 8

Complete sequence of the fabrication procedure for the ESLM arrays on Si/PLZT by laser assisted diffusion and recrystallization. We start with a cleaned PLZT wafer and deposit 3.5 μm of SiO2 by PECVD. The polysilicon is then deposited on both sides of the sample by LPCVD. (a) The masking oxide layer is deposited and diffusion windows are opened. (b) The phosphorosilica film is then spun on and baked to form the dopant layer, and the laser assisted diffusion and recrystallization is performed. (c)–(e) Then the standard NMOS fabrication procedures are carried out to complete the device except low temperature pyrogenic oxidation and etching for electrode contact to the PLZT.

Fig. 9
Fig. 9

Sequence of the CMOS fabrication process for the fabrication of the OSLM array. (a)–(c) The dopants are incorporated in this case by ion-implantation for both n and p-dopants. (d) The ion-implantation is followed by the laser recrystallization. (e)–(f) The process is then followed by the same procedure as (c)–(e) in Fig. 8 to complete the device fabrication.

Fig. 10
Fig. 10

I–V characteristics of NMOS transistor utilized in the ESLM array. The breakdown voltage is 50 V and the transconductance is 100 μS at gate voltage of 10 V. The mobility calculated from the transconductance value is 277 cm2/V-s.

Fig. 11
Fig. 11

Time response characteristics of a unit cell of the ESLM. The rise time and fall time edges in trace (a) are magnified 10× in time scale in trace (b). The rise time is ~10 μs, corresponding to a response frequency of 100 KHz.

Fig. 12
Fig. 12

Optical transmission characteristics of ESLM. For a modulation voltage of 48V, a dynamic range of 35:1 was achieved. Curve 1 shows a PLZT modulator of similar dimensions that was not integrated with silicon. Curve 2 is the transmission characteristics of the modulator integrated on Si/PLZT and driven by the fabricated NMOS transistor. The dynamic range of the ESLM is limited by the output of the NMOS transistor in the ESLM.

Fig. 13
Fig. 13

I–V characteristics of NMOS transistor used in the OSLM. The performance characteristics are similar to the NMOS transistor used in the ESLM.

Fig. 14
Fig. 14

Plot of the photocurrent generated by the FLIC-PTT as a function of light input. The dark current is shown in the plot.

Fig. 15
Fig. 15

Plot of the transfer characteristics of the FLIC-PTT as a function of light input. The switching voltage was 38V and a contrast ratio of 25:1 was achieved.

Fig. 16
Fig. 16

Photograph of two unit cells of the OSLM array. The right unit cell has its modulator in the ON state; the bright region of the modulator shows the contrast opposed to a neighboring modulator on the left in the OFF state.

Tables (1)

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Table I Performance of PMOS Transistor

Equations (2)

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R = Δ I p P abs ,
τ = L 2 R h ν q η μ V p = 0.28 μ s

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