Abstract

Most of the compute intensive SDI problem solving processors rely on a common set of algorithms found in numerical matrix algebra. Typically, all these problems are broken up into a set of linear equations where it is the processors task to solve this set. Algorithmic solutions range from the extensive use of the fast Fourier transform to the robust singular value decomposition method. Over the past several years considerable research has been focused on the use of arrays of computational processing elements, which, when configured correctly, will process these algorithms at extremely high speeds and with great algorithmic efficiency. To obtain these high speeds hardware development has progressed primarily in two areas: (1) semiconductor VLSI arrays utilizing 2-D planar semiconductor technology and (2) acoustooptic analog and digital arrays utilizing 3-D optical interconnect technology. This paper will focus on the formulation of 3-D optical interconnect methodology for numerical and general purpose binary combinatorial logic based optical computers.

© 1988 Optical Society of America

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References

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  1. H. J. Whitehouse, J. M. Speiser, K. Bromley, “Signal Processing Applications of Concurrent Array Processor Technology,” in VLSI and Modern Signal Processing (Prentice-Hall, Englewood Cliffs, NJ, 1985), p. 25.
  2. R. K. Brayton, G. D. Hachtel, C. T. McMullen, A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis (Kluwer Academic, Norwell, MA, 1984).
    [CrossRef]
  3. F. Hill, G. Peterson, Introduction to Switching Theory and Logical Design (Wiley, New York, 1981).
  4. Based on conversation with B. Berra.
  5. J. Millman, C. Halkias, Integrated Electronics: Analog and Digital Circuits and Systems (McGraw-Hill, New York, 1972), pp. 600–609.
  6. P. S. Guilfoyle, “Systolic Acousto-Optic Binary Convolver,” Opt. Eng. 23, 20 (1984).
    [CrossRef]
  7. B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
    [CrossRef]
  8. W. T. Rhodes, P. S. Guilfoyle, “Acousto-Optic Algebraic Processing Architectures,” Proc. IEEE 72, 820 (1984).
    [CrossRef]
  9. A. P. Goutzoulis, “On the System Efficiency of Digital Accuracy Acousto-Optic Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 639-11, 56–62 (1986).
  10. D. Psaltis, “Computational Power and Accuracy Tradeoffs in Optical Numerical Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 614, 165 (1986).
  11. S. Muroga, Logic Design and Switching Theory (Wiley, New York, 1979), pp. 163–181.
  12. W. V. Quine, “The Problem of Simplifying Truth Function,” Am. Math. Mon. 59, 521 (Oct.1952).
    [CrossRef]
  13. E. Morreale, “Partitioned List Techniques in Quine’s Method Implementation,” in Network and Switching Theory, G. Biorci, Ed. (Academic, New York, 1968).
  14. R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).
  15. P. S. Guilfoyle, “Problems in Two Dimensions,” Proc. Soc. Photo-Opt. Instrum. Eng. 341-26, (5May1982).
  16. P. S. Guilfoyle, “Time-Integrating Optical Processors in One Dimension,” Proc. Soc. Photo-Opt. Instrum. Eng. 214, 27 (1979).
  17. T. E. Bell, “Optical Computing: A Field In Flux,” IEEE Spectrum 23, No. 8, 34 (p. 49 for picture of SAOBiC) (Aug.1986).
  18. H. J. Whitehouse, J. M. Speiser, “Aspects of Signal Processing, Part 2,” in Proceedings, NATO Advanced Study Institute, G. Tacconi, Ed. (D. Reidel, Boston, 1976), pp. 669–702.
  19. J. M. Speiser, H. J. Whitehouse, “Review of Signal Processing with Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 431, 2 (1983).
  20. W. M. Gentleman, H. T. Kung, “Matrix Triangularization by Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 298, 19 (1981).
  21. G. Lebreton, “Power Spectrum of Raster-Scanned Signals,” Opt. Acta 29, No. 4, 413 (1982).
    [CrossRef]
  22. T. Turpin, “Spectrum Analysis Using Optical Processing,” Proc. IEEE 69, 79 (1981).
    [CrossRef]

1986 (4)

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

A. P. Goutzoulis, “On the System Efficiency of Digital Accuracy Acousto-Optic Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 639-11, 56–62 (1986).

D. Psaltis, “Computational Power and Accuracy Tradeoffs in Optical Numerical Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 614, 165 (1986).

T. E. Bell, “Optical Computing: A Field In Flux,” IEEE Spectrum 23, No. 8, 34 (p. 49 for picture of SAOBiC) (Aug.1986).

1984 (3)

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

W. T. Rhodes, P. S. Guilfoyle, “Acousto-Optic Algebraic Processing Architectures,” Proc. IEEE 72, 820 (1984).
[CrossRef]

P. S. Guilfoyle, “Systolic Acousto-Optic Binary Convolver,” Opt. Eng. 23, 20 (1984).
[CrossRef]

1983 (1)

J. M. Speiser, H. J. Whitehouse, “Review of Signal Processing with Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 431, 2 (1983).

1982 (2)

P. S. Guilfoyle, “Problems in Two Dimensions,” Proc. Soc. Photo-Opt. Instrum. Eng. 341-26, (5May1982).

G. Lebreton, “Power Spectrum of Raster-Scanned Signals,” Opt. Acta 29, No. 4, 413 (1982).
[CrossRef]

1981 (2)

T. Turpin, “Spectrum Analysis Using Optical Processing,” Proc. IEEE 69, 79 (1981).
[CrossRef]

W. M. Gentleman, H. T. Kung, “Matrix Triangularization by Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 298, 19 (1981).

1979 (1)

P. S. Guilfoyle, “Time-Integrating Optical Processors in One Dimension,” Proc. Soc. Photo-Opt. Instrum. Eng. 214, 27 (1979).

1952 (1)

W. V. Quine, “The Problem of Simplifying Truth Function,” Am. Math. Mon. 59, 521 (Oct.1952).
[CrossRef]

Bell, T. E.

T. E. Bell, “Optical Computing: A Field In Flux,” IEEE Spectrum 23, No. 8, 34 (p. 49 for picture of SAOBiC) (Aug.1986).

Bocker, R.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

Brayton, R. K.

R. K. Brayton, G. D. Hachtel, C. T. McMullen, A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis (Kluwer Academic, Norwell, MA, 1984).
[CrossRef]

Bromley, K.

H. J. Whitehouse, J. M. Speiser, K. Bromley, “Signal Processing Applications of Concurrent Array Processor Technology,” in VLSI and Modern Signal Processing (Prentice-Hall, Englewood Cliffs, NJ, 1985), p. 25.

Cohoon, R. L.

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

Drake, B.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

Gentleman, W. M.

W. M. Gentleman, H. T. Kung, “Matrix Triangularization by Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 298, 19 (1981).

Goutzoulis, A. P.

A. P. Goutzoulis, “On the System Efficiency of Digital Accuracy Acousto-Optic Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 639-11, 56–62 (1986).

Guilfoyle, P. S.

W. T. Rhodes, P. S. Guilfoyle, “Acousto-Optic Algebraic Processing Architectures,” Proc. IEEE 72, 820 (1984).
[CrossRef]

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

P. S. Guilfoyle, “Systolic Acousto-Optic Binary Convolver,” Opt. Eng. 23, 20 (1984).
[CrossRef]

P. S. Guilfoyle, “Problems in Two Dimensions,” Proc. Soc. Photo-Opt. Instrum. Eng. 341-26, (5May1982).

P. S. Guilfoyle, “Time-Integrating Optical Processors in One Dimension,” Proc. Soc. Photo-Opt. Instrum. Eng. 214, 27 (1979).

Hachtel, G. D.

R. K. Brayton, G. D. Hachtel, C. T. McMullen, A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis (Kluwer Academic, Norwell, MA, 1984).
[CrossRef]

Halkias, C.

J. Millman, C. Halkias, Integrated Electronics: Analog and Digital Circuits and Systems (McGraw-Hill, New York, 1972), pp. 600–609.

Hill, F.

F. Hill, G. Peterson, Introduction to Switching Theory and Logical Design (Wiley, New York, 1981).

Kung, H. T.

W. M. Gentleman, H. T. Kung, “Matrix Triangularization by Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 298, 19 (1981).

Lasher, M.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

Lebreton, G.

G. Lebreton, “Power Spectrum of Raster-Scanned Signals,” Opt. Acta 29, No. 4, 413 (1982).
[CrossRef]

Ligeti, E. L.

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

McMullen, C. T.

R. K. Brayton, G. D. Hachtel, C. T. McMullen, A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis (Kluwer Academic, Norwell, MA, 1984).
[CrossRef]

Miceli, W.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

Millman, J.

J. Millman, C. Halkias, Integrated Electronics: Analog and Digital Circuits and Systems (McGraw-Hill, New York, 1972), pp. 600–609.

Morreale, E.

E. Morreale, “Partitioned List Techniques in Quine’s Method Implementation,” in Network and Switching Theory, G. Biorci, Ed. (Academic, New York, 1968).

Muroga, S.

S. Muroga, Logic Design and Switching Theory (Wiley, New York, 1979), pp. 163–181.

Patterson, R.

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

Peterson, G.

F. Hill, G. Peterson, Introduction to Switching Theory and Logical Design (Wiley, New York, 1981).

Psaltis, D.

D. Psaltis, “Computational Power and Accuracy Tradeoffs in Optical Numerical Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 614, 165 (1986).

Quine, W. V.

W. V. Quine, “The Problem of Simplifying Truth Function,” Am. Math. Mon. 59, 521 (Oct.1952).
[CrossRef]

Rhodes, W. T.

W. T. Rhodes, P. S. Guilfoyle, “Acousto-Optic Algebraic Processing Architectures,” Proc. IEEE 72, 820 (1984).
[CrossRef]

Sangiovanni-Vincentelli, A. L.

R. K. Brayton, G. D. Hachtel, C. T. McMullen, A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis (Kluwer Academic, Norwell, MA, 1984).
[CrossRef]

Speiser, J. M.

J. M. Speiser, H. J. Whitehouse, “Review of Signal Processing with Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 431, 2 (1983).

H. J. Whitehouse, J. M. Speiser, “Aspects of Signal Processing, Part 2,” in Proceedings, NATO Advanced Study Institute, G. Tacconi, Ed. (D. Reidel, Boston, 1976), pp. 669–702.

H. J. Whitehouse, J. M. Speiser, K. Bromley, “Signal Processing Applications of Concurrent Array Processor Technology,” in VLSI and Modern Signal Processing (Prentice-Hall, Englewood Cliffs, NJ, 1985), p. 25.

Turpin, T.

T. Turpin, “Spectrum Analysis Using Optical Processing,” Proc. IEEE 69, 79 (1981).
[CrossRef]

Whitehouse, H. J.

J. M. Speiser, H. J. Whitehouse, “Review of Signal Processing with Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 431, 2 (1983).

H. J. Whitehouse, J. M. Speiser, K. Bromley, “Signal Processing Applications of Concurrent Array Processor Technology,” in VLSI and Modern Signal Processing (Prentice-Hall, Englewood Cliffs, NJ, 1985), p. 25.

H. J. Whitehouse, J. M. Speiser, “Aspects of Signal Processing, Part 2,” in Proceedings, NATO Advanced Study Institute, G. Tacconi, Ed. (D. Reidel, Boston, 1976), pp. 669–702.

Wiley, W. J.

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

Wright, C. S.

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

Am. Math. Mon. (1)

W. V. Quine, “The Problem of Simplifying Truth Function,” Am. Math. Mon. 59, 521 (Oct.1952).
[CrossRef]

IEEE Spectrum (1)

T. E. Bell, “Optical Computing: A Field In Flux,” IEEE Spectrum 23, No. 8, 34 (p. 49 for picture of SAOBiC) (Aug.1986).

Opt. Acta (1)

G. Lebreton, “Power Spectrum of Raster-Scanned Signals,” Opt. Acta 29, No. 4, 413 (1982).
[CrossRef]

Opt. Eng. (2)

P. S. Guilfoyle, “Systolic Acousto-Optic Binary Convolver,” Opt. Eng. 23, 20 (1984).
[CrossRef]

B. Drake, R. Bocker, M. Lasher, R. Patterson, W. Miceli, “Photonic Computing Using the Modified Signed-Digit Number Representation,” Opt. Eng. 25, 38 (1986).
[CrossRef]

Proc. IEEE (2)

W. T. Rhodes, P. S. Guilfoyle, “Acousto-Optic Algebraic Processing Architectures,” Proc. IEEE 72, 820 (1984).
[CrossRef]

T. Turpin, “Spectrum Analysis Using Optical Processing,” Proc. IEEE 69, 79 (1981).
[CrossRef]

Proc. Soc. Photo-Opt. Instrum. Eng. (7)

A. P. Goutzoulis, “On the System Efficiency of Digital Accuracy Acousto-Optic Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 639-11, 56–62 (1986).

D. Psaltis, “Computational Power and Accuracy Tradeoffs in Optical Numerical Processors,” Proc. Soc. Photo-Opt. Instrum. Eng. 614, 165 (1986).

J. M. Speiser, H. J. Whitehouse, “Review of Signal Processing with Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 431, 2 (1983).

W. M. Gentleman, H. T. Kung, “Matrix Triangularization by Systolic Arrays,” Proc. Soc. Photo-Opt. Instrum. Eng. 298, 19 (1981).

R. L. Cohoon, C. S. Wright, W. J. Wiley, P. S. Guilfoyle, E. L. Ligeti, “Acousto-Optic Convolver for Digital Pulses,” Proc. Soc. Photo-Opt. Instrum. Eng. 519-06 (25Oct.1984); also Opt. Eng. 23, 480 (1986).

P. S. Guilfoyle, “Problems in Two Dimensions,” Proc. Soc. Photo-Opt. Instrum. Eng. 341-26, (5May1982).

P. S. Guilfoyle, “Time-Integrating Optical Processors in One Dimension,” Proc. Soc. Photo-Opt. Instrum. Eng. 214, 27 (1979).

Other (8)

E. Morreale, “Partitioned List Techniques in Quine’s Method Implementation,” in Network and Switching Theory, G. Biorci, Ed. (Academic, New York, 1968).

H. J. Whitehouse, J. M. Speiser, “Aspects of Signal Processing, Part 2,” in Proceedings, NATO Advanced Study Institute, G. Tacconi, Ed. (D. Reidel, Boston, 1976), pp. 669–702.

S. Muroga, Logic Design and Switching Theory (Wiley, New York, 1979), pp. 163–181.

H. J. Whitehouse, J. M. Speiser, K. Bromley, “Signal Processing Applications of Concurrent Array Processor Technology,” in VLSI and Modern Signal Processing (Prentice-Hall, Englewood Cliffs, NJ, 1985), p. 25.

R. K. Brayton, G. D. Hachtel, C. T. McMullen, A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis (Kluwer Academic, Norwell, MA, 1984).
[CrossRef]

F. Hill, G. Peterson, Introduction to Switching Theory and Logical Design (Wiley, New York, 1981).

Based on conversation with B. Berra.

J. Millman, C. Halkias, Integrated Electronics: Analog and Digital Circuits and Systems (McGraw-Hill, New York, 1972), pp. 600–609.

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Figures (24)

Fig. 1
Fig. 1

Three-dimensional globally interconnected optical gates.

Fig. 2
Fig. 2

One-bit equality detection circuit schematic.

Fig. 3
Fig. 3

Word equality detection circuit schematic. E is high if word A equals word B.

Fig. 4
Fig. 4

Optical word comparator circuit.

Fig. 5
Fig. 5

Programmable logic array representation of the optical computer.

Fig. 6
Fig. 6

Three-dimensional word string Text Searcher optical computer.

Fig. 7
Fig. 7

Block diagram representation of systolically interconnected PLAs.

Fig. 8
Fig. 8

Optical systolic equality detector equivalent schematic (optical data base machine).

Fig. 9
Fig. 9

Sequential digital full adder circuit.

Fig. 10
Fig. 10

Optical full adder (nonbroadcast, full parallel).

Fig. 11
Fig. 11

Optical full adder using full broadcast.

Fig. 12
Fig. 12

Input combinational logic conditioner. For the 2- × 2-bit multiply case; five Boolean combinations are sent to the optical computer where in each PLA plane the circuit of Fig. 13 is generated optically to complete the multiply process.

Fig. 13
Fig. 13

Schematic representation of each PLA plane in the optical computer. The Boolean combination data are sent to two sets of eight electrodes (in the nonglobal parallel configuration) where their products are optically anded, and their outputs are subsequently ored by a detector. The output from the detectors is the correct binary bit weighted 4-bit multiplication result.

Fig. 14
Fig. 14

Optical systolic 2- × 2-bit multiply array can be configured to produce a linear array of output multiplies. Shown above is a 3 word by 1 word linear array. Two eight-channel acoustooptic cells are required. The five combinations produced in the combination generators are sent to each of eight channels, respectively. In this parallel configuration the first channel merely illuminated an output detector producing O1. The next four channels are combined onto the second detector where if light is present at any level (1–4), it must merely detect its presence and produce a 1 at the output. Should no light be available the output remains at zero. A 4:1 gain is thus realized. The output represents O2. This process is then repeated for the other two detectors in the PLA to produce O3 and O4, respectively.

Fig. 15
Fig. 15

Electronic gate representation of an optical multiply vector (3 by 1) 2 × 2 multipliers.

Fig. 16
Fig. 16

Electronic combination generator for 3- × 3-bit multiplication.

Fig. 17
Fig. 17

Six and-or-invert networks used after the combination generator to complete a 3- × 3-bit multiplication. These are ultimately implemented in the optical computer.

Fig. 18
Fig. 18

Parallel hardware implementation of the digital optical 3- × 3-bit combinatorial systolic multiplication array.

Fig. 19
Fig. 19

End view of Fig. 18.

Fig. 20
Fig. 20

Global optical interconnect scheme for each output bit of the 3- × 3-bit multiply.

Fig. 21
Fig. 21

Composite superimposition of each output bit global interconnect for 3- × 3-bit multiply PLA.

Fig. 22
Fig. 22

Planar global interconnect configuration for each PLA plane of the 2 × 2 systolic multiplication vector of Fig. 14.

Fig. 23
Fig. 23

2- × 2-bit folded combinatorial interconnect for global optical flash multiplication.

Fig. 24
Fig. 24

Optical computer hardware configuration for general purpose programmable combinatorial logic PLA computation elements. Fourier transform holographic elements are programmed to provide fixed interconnects which define the sum of product interactions. Acoustooptic devices are used for the I/O ports and local memory storage.

Tables (3)

Tables Icon

Table I Combinatorial Assignment for Full Parallel Optical Imaging System for 3- × 3-Bit Binary Multiplication

Tables Icon

Table II Drive Channel Assignment of Combinatorial Terms

Tables Icon

Table III Combination Table for n- × n-Bit Multiplication

Equations (3)

Equations on this page are rendered with MathJax. Learn more.

O 1 = A 0 B 0 ; O 2 = A 0 B 0 ¯ B 1 + A 0 ¯ A 1 B 0 + A 1 B 0 B 1 ¯ + A 0 A 1 ¯ B 1 ; O 3 = A 1 B 0 ¯ B 1 + A 0 ¯ A 1 B 1 ; O 4 = A 0 A 1 B 0 B 1 .
O 1 = A 0 B 0 ; O 2 = A 0 B 0 ¯ B 1 + A 0 ¯ A 1 B 0 + A 1 B 0 B 1 ¯ + A 0 A 1 ¯ B 1 ; O 3 = A 0 ¯ A 1 ¯ A 2 B 0 + A 0 B 0 ¯ B 1 ¯ B 2 + A 0 A 2 B 0 B 2 ¯ + A 0 A 2 ¯ B 0 B 2 + A 1 B 0 ¯ B 1 B 2 ¯ + A 0 ¯ A 1 A 2 ¯ B 1 + A 0 ¯ A 1 B 0 ¯ B 1 + A 0 ¯ A 1 A 2 B 0 B 1 ¯ + A 0 A 1 ¯ B 0 ¯ B 1 B 2 ; O 4 = A 1 B 0 ¯ B 1 ¯ B 2 + A 0 ¯ A 1 ¯ A 2 B 1 + A 0 A 2 B 0 ¯ B 1 + A 0 ¯ A 1 B 0 B 2 + A 1 ¯ A 2 B 1 B 2 ¯ + A 1 A 2 ¯ B 1 ¯ B 2 + A 2 B 0 ¯ B 1 B 2 ¯ + A 0 ¯ A 1 A 2 ¯ B 2 + A 0 A 1 ¯ A 2 B 0 B 1 ¯ B 2 + A 0 A 1 A 2 ¯ B 0 B 1 B 2 ¯ ; O 5 = A 2 B 0 ¯ B 1 ¯ B 2 + A 0 ¯ A 1 ¯ A 2 B 2 + A 0 ¯ A 2 B 1 ¯ B 2 + A 1 ¯ A 2 B 0 ¯ B 2 + A 1 ¯ A 2 B 1 ¯ B 2 + A 0 A 1 A 2 ¯ B 1 B 2 + A 1 A 2 B 0 B 1 B 2 ¯ + A 0 A 1 A 2 B 0 B 1 B 2 ; O 6 = A 1 A 2 B 1 B 2 + A 0 A 1 A 2 B 0 B 2 + A 0 A 2 B 0 B 1 B 2 .
C = i = 1 n ( n i ) ( 2 i 1 ) .

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