Abstract

A new technique for space-variant processing with optical array logic and a new concept for parallel processing called pattern logic are proposed. Optical array logic is a technique for achieving any parallel neighborhood operation by simple coding, optical correlation, and parallel or operation. Using pattern logic, various kinds of parallel processing can be realized, which can be implemented by optical array logic. Several kinds of numerical data processing are presented to verify the capability of pattern logic.

© 1988 Optical Society of America

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References

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  1. A. Huang, “Parallal Algorithms for Optical Digital Computers,” in Proceedings, Tenth International Optical Computing Conference (MIT Press, Cambridge, 1983), pp. 13–17.
    [CrossRef]
  2. K.-H. Brenner, A. Huang, N. Streibl, “Digital Optical Computing with Symbolic Substitution,” Appl. Opt. 25, 3054 (1986).
    [CrossRef] [PubMed]
  3. M. J. Murdocca, “Digital Optical Computing with One-Rule Cellular Automata,” Appl. Opt. 26, 682 (1987).
    [CrossRef] [PubMed]
  4. J. Tanida, Y. Ichioka, “Optical Logic Array Processor Using Shadowgrams,” J. Opt. Soc. Am. 73, 800 (1983).
    [CrossRef]
  5. J. Tanida, Y. Ichioka, “Optical-Logic-Array Processor Using Shadowgrams. II. Optical Parallel Digital Image Processing,” J. Opt. Soc. Am. A 2, 1237 (1985).
    [CrossRef]
  6. J. Tanida, Y. Ichioka, “Optical-Logic-Array Processor Using Shadowgrams. III. Parallel Neighborhood Operations and an Architecture of an Optical Digital-Computing System,” J. Opt. Soc. Am. A 2, 1245 (1985).
    [CrossRef]
  7. J. Tanida, Y. Ichioka, “Programming of Optical Array Logic. 1: Image Data Processing,” Appl. Opt. 27, 2926 (1988).
    [CrossRef] [PubMed]
  8. J. Tanida, Y. Ichioka, “OPALS: Optical Parallel Array Logic System,” Appl. Opt. 25, 1565 (1986).
    [CrossRef] [PubMed]
  9. J. Tanida, Y. Ichioka, “Optical Parallel Array Logic System. 2: A New System Architecture without Memory Elements,” Appl. Opt. 25, 3751 (1986).
    [CrossRef] [PubMed]
  10. J. Tanida, Y. Ichioka, “Modular Components for an Optical Array Logic System,” Appl. Opt. 26, 3954 (1987).
    [CrossRef] [PubMed]
  11. H. Fleisher, L. I. Maissel, “An Introduction to Array Logic,” IBM J. Res. Develop. 19, 98 (1975).
    [CrossRef]
  12. K. Preston, M. J. B. Duff, Modern Cellular Automata (Plenum, New York, 1984).
  13. T. J. Drabik, S. H. Lee, “Shift-Connected simd Array Architectures for Digital Optical Computing Systems, with Algorithms for Numerical Transforms and Partial Differential Equations,” Appl. Opt. 25, 4053 (1986).
    [CrossRef] [PubMed]
  14. K. Hwang, F. A. Briggs, Computer Architecture and Parallel Processing (McGraw-Hill, New York, 1985).
  15. E. Swartzlander, “Digital Optical Arithmetic,” Appl. Opt. 25, 3021 (1986).
    [CrossRef] [PubMed]
  16. J. Tanida, J. Nakagawa, Y. Ichioka, “Birefringent Encoding and Multichannel Reflective Correlator for Optical Array Logic,” Appl. Opt.27 (1988), submitted.
    [CrossRef] [PubMed]

1988

1987

1986

1985

1983

1975

H. Fleisher, L. I. Maissel, “An Introduction to Array Logic,” IBM J. Res. Develop. 19, 98 (1975).
[CrossRef]

Brenner, K.-H.

Briggs, F. A.

K. Hwang, F. A. Briggs, Computer Architecture and Parallel Processing (McGraw-Hill, New York, 1985).

Drabik, T. J.

Duff, M. J. B.

K. Preston, M. J. B. Duff, Modern Cellular Automata (Plenum, New York, 1984).

Fleisher, H.

H. Fleisher, L. I. Maissel, “An Introduction to Array Logic,” IBM J. Res. Develop. 19, 98 (1975).
[CrossRef]

Huang, A.

K.-H. Brenner, A. Huang, N. Streibl, “Digital Optical Computing with Symbolic Substitution,” Appl. Opt. 25, 3054 (1986).
[CrossRef] [PubMed]

A. Huang, “Parallal Algorithms for Optical Digital Computers,” in Proceedings, Tenth International Optical Computing Conference (MIT Press, Cambridge, 1983), pp. 13–17.
[CrossRef]

Hwang, K.

K. Hwang, F. A. Briggs, Computer Architecture and Parallel Processing (McGraw-Hill, New York, 1985).

Ichioka, Y.

Lee, S. H.

Maissel, L. I.

H. Fleisher, L. I. Maissel, “An Introduction to Array Logic,” IBM J. Res. Develop. 19, 98 (1975).
[CrossRef]

Murdocca, M. J.

Nakagawa, J.

J. Tanida, J. Nakagawa, Y. Ichioka, “Birefringent Encoding and Multichannel Reflective Correlator for Optical Array Logic,” Appl. Opt.27 (1988), submitted.
[CrossRef] [PubMed]

Preston, K.

K. Preston, M. J. B. Duff, Modern Cellular Automata (Plenum, New York, 1984).

Streibl, N.

Swartzlander, E.

Tanida, J.

Appl. Opt.

IBM J. Res. Develop.

H. Fleisher, L. I. Maissel, “An Introduction to Array Logic,” IBM J. Res. Develop. 19, 98 (1975).
[CrossRef]

J. Opt. Soc. Am.

J. Opt. Soc. Am. A

Other

A. Huang, “Parallal Algorithms for Optical Digital Computers,” in Proceedings, Tenth International Optical Computing Conference (MIT Press, Cambridge, 1983), pp. 13–17.
[CrossRef]

K. Preston, M. J. B. Duff, Modern Cellular Automata (Plenum, New York, 1984).

K. Hwang, F. A. Briggs, Computer Architecture and Parallel Processing (McGraw-Hill, New York, 1985).

J. Tanida, J. Nakagawa, Y. Ichioka, “Birefringent Encoding and Multichannel Reflective Correlator for Optical Array Logic,” Appl. Opt.27 (1988), submitted.
[CrossRef] [PubMed]

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Figures (15)

Fig. 1
Fig. 1

Processing procedures of OAL for a parallel neighborhood operation including coding rule.

Fig. 2
Fig. 2

Symbols for symbolic notation of OAL.

Fig. 3
Fig. 3

Schematic diagram of pattern logic. Objects to be processed are converted into pixel patterns and placed in image planes.

Fig. 4
Fig. 4

Data and attribute patterns. An attribute is defined for each pixel in a data pattern. The projected pattern of all attribute patterns is called an overlaid attribute pattern.

Fig. 5
Fig. 5

Data structure for N-bit signed integers. For two-operand operation, two patterns are placed side by side.

Fig. 6
Fig. 6

Data flow in the OPALS. Algorithms presented in this paper are assumed to be processed according to this data flow.

Fig. 7
Fig. 7

Attribute patterns for addition and their pattern degeneracy; data arrangements (a) without pattern degeneracy and (b) with pattern degeneracy.

Fig. 8
Fig. 8

Simulated result of addition; (a) two addends, (b) their data plane, (c) attribute plane, (d) coded image in OAL, (e)–(g) correlated and (h)–(j) sampled images for each product term operations in Eq. (15), (k) result of Eq. (15) at the first iteration, (l)–(n) results of Eq. (15) at every iteration after second, (o) final result of addition.

Fig. 9
Fig. 9

Simulated result of matrix addition.

Fig. 10
Fig. 10

Processing sequence of 3-bit multiplication.

Fig. 11
Fig. 11

Overlaid attribute patterns for 3-bit multiplication.

Fig. 12
Fig. 12

Simulated result of multiplication for an array form of data. At each stage, attribute and data planes are shown at left- and right-hand sides, respectively.

Fig. 13
Fig. 13

Simulated result of absolute-value operation.

Fig. 14
Fig. 14

Schematic diagram of the extended version of the OPALS for pattern logic.

Fig. 15
Fig. 15

Processing unit of OAL: (a) block diagram and (b) an optical implementation using a shadow-casting system.

Tables (2)

Tables Icon

Table I Estimation of Required Numbers of Pixels and Iteration for Numerical Processing

Tables Icon

Table II Required Size of Operation Kernel and Required Number of Kernel Units for Numerical Processing

Equations (25)

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c i , j = k = 1 K m = - L L n = - L L f m , n ; k ( a i + m , j + n , b i + m , j + n ) ,             ( i , j = 1 , , N ) ,
c = k = 1 K m = - L L n = - L L f m , n ; k ( a m , n , b m , n ) .
c = k = 1 K P k ( a , b ) Q k ( b ) ,
P k ( a , b ) = m = - L L n = - L L p m , n ; k ( a m , n , b m , n ) ,
Q k ( b ) = m = - L L n = - L L q m , n ; k ( b m , n ) ,
f m , n ; k ( a m , n , b m , n ) = p m , n ; k ( a m , n , b m , n ) q m , n ; k ( b m , n ) ;
[ .. .0 .. .. 11 _ .. .. .. .. ] + [ .. .. .. .. 01 _ .. .. .0 .. ] ,
c = a 0 , 0 b 0 , 0 b ¯ - 1 , 0 + a ¯ 0 , 0 b 0 , 0 b ¯ 1 , 0 .
s i = x i y i ,
c i + 1 = x i y i ,
S ( b ) = b 0 , 0 b - 1 , 0 ,
C ( b ) = b 0 , 1 b 1 , 1 .
P S ( a , b ) = a ¯ 0 , 0 a - 1 , 0 ,
P C ( a , b ) = a 0 , 0 a ¯ 1 , 0 .
c = P S ( a , b ) S ( b ) + P C ( a , b ) C ( b ) = a ¯ 0 , 0 a - 1 , 0 ( b 0 , 0 b - 1 , 0 ) + a 0 , 0 a ¯ 1 , 0 ( b 0 , 1 b 1 , 1 ) = a ¯ 0 , 0 b 0 , 0 a - 1 , 0 b ¯ - 1 , 0 + a ¯ 0 , 0 b ¯ 0 , 0 a - 1 , 0 b - 1 , 0 + a 0 , 0 a ¯ 1 , 0 b 0 , 1 b 1 , 1 .
[ .. 10 .. .. 01 _ .. .. .. .. ] + [ .. 11 .. .. 00 _ .. .. .. .. ] + [ .. .. .. .. 1. _ .1 .. 0. .1 ] .
P n ( a , b ) = { j = - 2 2 a - 2 , j b - 2 , j ( n = 0 ) , j = - 2 2 a - 1 , j b - 1 , j ( n = 1 , 2 ) ,
D n ( b ) = { b - 3 , 0 ( n = 0 ) , b - 2 , n ( n = 1 , 2 ) .
I ( b ) = b 0 , 0 ,
C n = P n ( a , b ) D n ( b ) + I ( b ) = { b - 3 , 0 j = - 2 2 a - 2 , j b - 2 , j + b 0 , 0 ( n = 0 ) , b - 2 , n j = - 2 2 a - 1 , j b - 1 , j + b 0 , 0 ( n = 1 , 2 ) .
C ¯ n = { b ¯ 0 , 0 b ¯ - 3 , 0 + b ¯ 0 , 0 - 2 2 ( a ¯ - 2 , j + b ¯ - 2 , j ) ( n = 0 ) , b ¯ 0 , 0 b ¯ - 2 , n + b ¯ 0 , 0 - 2 2 ( a ¯ - 1 , j + b ¯ - 1 , j ) ( n = 1 , 2 ) ,
I ¯ ( b ) = b ¯ 0 , 0
[ .0 .. .. .0 _ ] + [ N N N N N N N N N N .. .. .. .. .. .. .. .0 _ .. .. ] ( n = 0 ) ,
[ .. .0 .. .. .0 _ .. ] + [ N N N N N N N N N N .. .. .0 _ .. .. ] ( n = 1 ) ,
[ .. .. .0 .. .. .. .0 _ .. .. ] + [ N N N N N N N N N N .. .. .0 _ .. .. ] ( n = 2 ) .

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