Abstract

A cascadable residue arithmetic processor based on optical Fredkin gate arrays and page-oriented holographic memories is introduced. The implementations of residue functions and operations by this processor are described. Analytic expressions are derived for the number of holograms and waveguide channels required for the implementation of residue addition and multiplication. The practical cases of 16-bit addition and multiplication are analyzed as specific examples. It is shown that, using the proposed architecture, these operations can be implemented with state-of-the-art technologies in holography and integrated optics.

© 1987 Optical Society of America

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