Abstract
This paper describes a smart pixel array module (APSM) technology based on a monolithically integrated two-dimensional array VCSELs and photodetectors, and its heterogeneous integration with Si ASICs and passive optics. All campoment and integration approaches are compatible with low cost manufacturing practices, and consistent with the ultimate goal of addressing the electrical interconnect density bottleneck problem.
© 1999 Optical Society of America
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