A low-power 2-channel PAM4 transmitter front-end consisting of 65-nm CMOS PAM4 shunt LD drivers and flip-chip-bonded 1.3-μm LD-array-on-Si achieves simultaneous 2ch × 53-Gps PAM4 transmission over 2-km-long SSMF with power efficiency of 0.57 mW/Gbps.
© 2020 The Author(s)
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