Demonstration of a real-time receiver working with 28 GBd at 32 GSa/s. The signal processing is done on a single FPGA. The resource-saving non-integer oversampling of 8/7 is enabled by a timing synchronization in the frequency domain.

© 2017 Optical Society of America

PDF Article
More Like This
FPGA-based Real-Time Receiver for Nyquist-FDM at 112 Gbit/s sampled with 32 GSa/s

B. Baeuerle, A. Josten, M. Eppenberger, E. Dornbierer, D. Hillerkuss, and J. Leuthold
M2C.1 Optical Fiber Communication Conference (OFC) 2017

Coherent Reception of NFDM Signals on a Single FPGA-Board Enabled by Low Complexity Algorithms

Arne Josten, Benedikt Baeuerle, and Juerg Leuthold
M2H.4 Asia Communications and Photonics Conference (ACPC) 2017

FPGA-based Real-Time Receivers for Nyquist-FDM

Benedikt Baeuerle, Arne Josten, Marco Eppenberger, David Hillerkuss, and Juerg Leuthold
SpM3F.3 Signal Processing in Photonic Communications (SPPCom) 2017


You do not have subscription access to this journal. Citation lists with outbound citation links are available to subscribers only. You may subscribe either as an OSA member, or as an authorized user of your institution.

Contact your librarian or system administrator
Login to access OSA Member Subscription