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Conferences > OFC > 2017 > W1A > W1A.3

Demonstration of a Packaged Photonic Integrated Network on Chip controlled by an FPGA-based scheduler

Y. Xiong, N. Andriolli, S. Faralli, F. Gambini, P. Pintus, M. Chiesa, R. Ortuño, O. Liboiron-Ladouceur, and I. Cerutti

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Abstract

The dynamic performance of a packaged photonic network-on-chip (NoC) based on multi-microrings is experimentally demonstrated. Controlled by a scheduler implemented in an FPGA, the packaged photonic NoC exhibits a BER penalty of approximately 0.5 dB.

© 2017 Optical Society of America

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