Monolithic CMOS photonics seeks to minimize total transceiver cost by simplifying packaging, design and test. Here we examine 25 Gb/s applications in the context of integrated transistor performance and demonstrate a 4λ×25 Gb/s reference design.

© 2016 Optical Society of America

PDF Article


You do not have subscription access to this journal. Citation lists with outbound citation links are available to subscribers only. You may subscribe either as an OSA member, or as an authorized user of your institution.

Contact your librarian or system administrator
Login to access OSA Member Subscription