Abstract

We demonstrate a novel 16GHz physical layer optical cache memory architecture for the 2-way set associative cache mapping scheme. Both memory addresses and optical words are WDM-formatted while physical layer simulations demonstrate successful Read/Write operation.

© 2014 Optical Society of America

PDF Article
More Like This
A novel Chip-Multiprocessor Architecture with optically interconnected shared L1 Optical Cache Memory

P. Maniotis, S. Gitzenis, L. Tassiulas, and N. Pleros
Th2A.9 Optical Fiber Communication Conference (OFC) 2014

All-Optical Tag Comparator for 10Gb/s WDM-enabled Optical Cache Memory Architectures

C. Mitsolidou, C. Vagionas, S. Pitris, J. Bos, P. Maniotis, D. Tsiokos, and N. Pleros
Th2A.53 Optical Fiber Communication Conference (OFC) 2016

A New Optical Network-on-Chip Architecture for Chip Multiprocessor

Xiuhua Li, Kang Wang, Ke Chen, Huaxi Gu, Liang song, and Qinfen Hao
ASu1H.2 Asia Communications and Photonics Conference (ACPC) 2015

References

You do not have subscription access to this journal. Citation lists with outbound citation links are available to subscribers only. You may subscribe either as an OSA member, or as an authorized user of your institution.

Contact your librarian or system administrator
or
Login to access OSA Member Subscription

Supplementary Material (1)

» Media 1: PDF (1187 KB)