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Conferences > OFC > 2014 > Th2A > Th2A.6

A 16GHz Optical Cache Memory Architecture for Set-Associative Mapping in Chip Multiprocessors

P. Maniotis, D. Fitsios, G.T. Kanellos, and N. Pleros

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Abstract

We demonstrate a novel 16GHz physical layer optical cache memory architecture for the 2-way set associative cache mapping scheme. Both memory addresses and optical words are WDM-formatted while physical layer simulations demonstrate successful Read/Write operation.

© 2014 Optical Society of America

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