The explosive increase in internet traffic requires cost-effective optical networks between and within datacenters. However, to build these cost-effective networks, we need to fundamentally change how we manufacture InP-based photonic devices. InP/Si photonic integrated circuits (PICs) using silicon-photonics technologies are promising for such short-distance communications. Silicon-photonics technologies enable the integration of several functional devices except for lasers on a single compact chip, which can dramatically reduce assembly and packaging costs. Therefore, a cost-effective way to integrate InP-based active devices on a silicon-based platform is strongly desired. In this context, we have developed a new III-V/Si integration scheme in which an InP membrane is directly bonded to SiO2/Si substrate (InP-on-insulator) as an epitaxial template. Compared with a direct-growth scheme, this scheme solves the problems of lattice mismatch and the formation of anti-phase boundaries. In addition, we overcame the crystal degradation due to the difference in coefficient of thermal expansion, by keeping the III-V layer thickness at less than ~400 nm. Using this technique, we have so far developed energy-efficient >25-Gbit/s directly modulated lasers (DMLs) [1, 2].
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