Abstract

The packaging of OEIC chips is a major contributor to the costs of optoelectronic modules for optical telecommunication systems. This is mainly due to the submicron precision requirements needed for the optical connections between waveguide components and single mode fibers (SMF). Self-alignment technologies, especially important for fiber array connections, allow to reduce critical positioning and fastening steps. The good thermal and mechanical properties of silicon combined with the possibility to fabricate precise V-grooves for fiber to waveguide alignments together with electrical connection techniques make them appropriate as mounting boards for OEIC’s. V-grooves are commonly used to align fibers in arrays and different techniques have been proposed to align the upside down mounted waveguide devices to the fibers. The surface tension and wetting properties of liquid solder can be used to “pull” the chips into the desired position /1/, /2/, or mechanical alignment is achieved using etched pedestals and microstops on the silicon combined with alignment trenches on the waveguide chip /3/, /4/. We developed a flipchip packaging technique for OEIC’s on Si motherboards, which combines self-aligned optical array coupling with flexible beam-lead electronic interconnections, in which the V-grooves are not only used to align the fibers in an array, but also for the alignment of the waveguide device relative to the fibers /5/, /6/.

© 1994 Optical Society of America