Abstract

Given the explosive growth in data-centric artificial intelligence workloads and the imminent end of CMOS scaling laws, it is becoming increasingly clear that we need to transition to brain-inspired architectures where memory and processing are collocated. A first step in this direction could be in-memory computing whereby certain computational tasks are performed in place by exploiting the physical attributes of memory devices [1,2]. In the conventional electrical domain, emerging resistive memory devices or memristive devices could play a key role as elements of such a computational memory unit. For example, when organized in a cross-bar configuration, phase-change memory (PCM) devices can be used to perform matrix-vector multiplications with very low computational complexity [3]. An appealing application of this concept is for the problem of compressed sensing and recovery of high-dimensional signals [4]. This is an application in which the lack of precision arising from the matrix-vector multiplication operations is not prohibitive. However, in other applications such as solving systems of linear equations or training deep neural networks, the lack of precision could be a key challenge. To address this, the concept of mixed-precision in-memory computing was proposed, where through a judicious combination of high-precision processing units and computational memory, we can achieve arbitrarily high precision, while still retaining much of the benefits of non-von Neumann computing [5].

© 2019 IEEE

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