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Optica Publishing Group
  • 2015 European Conference on Lasers and Electro-Optics - European Quantum Electronics Conference
  • (Optica Publishing Group, 2015),
  • paper CK_P_33

Contactless Light Monitoring in InP-based Waveguides

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Abstract

The increasing complexity of Photonic Integrated Circuits, which can include nowadays hundreds of single building blocks [1], is posing the problem of the easy and real-time monitoring of the working point of devices and circuits. This capability is fundamental to stabilize the circuit against fabrication tolerances, environmental fluctuations, crosstalk, and non-idealities, and to assist techniques and algorithms required by active tuning of the circuit response. Transparent operation of the monitors is hence a desirable feature, allowing the implementation of many probe points with negligible impact on the circuit transfer function. In previous papers [2,3] we proposed the ContactLess Integrated Photonic Probe (CLIPP) as an innovative approach to realize a transparent and non-invasive light power monitor in silicon photonics waveguides and devices. The CLIPP measures the variations of the waveguide core conductivity induced by the presence of guided light through a surface-states carrier generation effects [2]. A capacitive access to the waveguide guarantees transparent operation. In this work we demonstrate the implementation of the CLIPP on Indium Phosphide based waveguides, introducing an innovative vertical approach that allows reducing the overall area required by the CLIPP. The schematic representation of the InP-based CLIPP is reported in Fig. 1a. The waveguide has a 2 μm-wide rib shape with 1 μm-thick InGaAsP core and an etch depth of 600 nm. The electrical probe of the light intensity is guaranteed by a pair of electrodes. The first one is realized on the top of the waveguide and is isolated from the core by a SiN layer which provides the necessary capacitive access to the waveguide (CA in Fig. 1a). In the realized device the length of the electrode is about 2 mm. The small conductivity of the entire layer stack (carrier concentration comprised between 107 cm−3 to 108 cm−3) makes it possible to use the back side of the chip as a large common electrode shared by all the CLIPPs. The bottom side of the sample is contacted directly through a metal holder, without requiring any extra metallization. The waveguide core and substrate represent two conductances (Gwg and Gs) in series to CA.

© 2015 IEEE

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