Abstract

This paper describes an optical interconnect solution based on a monolithic photonic CMOS architecture. A photonic CMOS process enables higher bandwidth and lower energy-per-bit for chip-to-chip optical I/O through integration of electro-optical polymer based modulators, silicon nitride waveguides and polycrystalline germanium (Ge) photodetectors in a CMOS logic process. Experimental results for both the photonic CMOS ring resonator modulators and Ge detectors demonstrate 40 Gb/s performance.

© 2010 Optical Society of America

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