Abstract

Electrooptic sampling is a promising technique for the noninvasive measurement of electrical signals at internal nodes of GaAs integrated circuits (ICs).¹ The optimum geometry for probing a planar IC is backside probing, in which the probe beam enters the circuit from the back (inactive) side. This geometry maximizes voltage sensitivity and spatial resolution^1–3 but has the disadvantage that a custom test fixture is usually needed to provide optical access to the back of the IC. To probe planar ICs that have been packaged, a front-side probing geometry is mandatory.

© 1988 Optical Society of America