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Implementation of High-speed Buffer Management for Asynchronous Variable-length Optical Packet Switch

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Abstract

We develop an FPGA-based buffer management hardware with 8 input ports, which implements a parallel and pipeline mechanism to support over-200-Mpacket/s/port asynchronous variable-length optical packet switching. Optical buffering for asynchronous variable-length packets is demonstrated.

© 2010 IEEE Communications Society, IEEE Photonics Society, OSA, Telcordia

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