Expand this Topic clickable element to expand a topic
Skip to content
Optica Publishing Group

CMOS plasmonics in WDM data transmission: 200 Gb/s (8 × 25Gb/s) transmission over aluminum plasmonic waveguides

Open Access Open Access

Abstract

We demonstrate wavelength-division-multiplexed (WDM) 200 Gb/s (8 × 25 Gb/s) data transmission over 100 μm long aluminum (Al) surface-plasmon-polariton (SPP) waveguides on a Si3N4 waveguide platform at telecom wavelengths. The Al SPP waveguide was evaluated in terms of signal integrity by performing bit-error-rate (BER) measurements that revealed error-free operation for all eight 25 Gb/s non-return-to-zero (NRZ) modulated data channels with power penalties not exceeding 0.2 dB at 10−9. To the best of our knowledge, this is the first demonstration of WDM enabled data transmission over complementary-metal-oxide-semiconductor (CMOS) SPP waveguides fueling future development of CMOS compatible plasmo-photonic devices for on-chip optical interconnections.

© 2018 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

Plasmonics have been introduced as a key technology that may revolutionize future on-chip optical interconnects by providing seamless co-integration with electronics due to their metallic nature and increased light matter interaction, which allows for ultra-low energy consumption requirements in a range of active plasmonic functions [1–5]. Their high propagation losses can be mitigated via the selective co-integration of plasmonic SPP waveguides with silicon photonic platforms, allowing for the use of plasmonic structures only at the circuit sections where their size and energy consumption advantages are necessary, while exploiting the numerous low-loss optical functions offered by photonics [2–6]. This approach can boom the performance of photonic-integrated-circuits (PICs) in on-chip data transmission applications reaping the benefits of both technologies, provided, however, that plasmonics will prove their potential also when relying on CMOS compatible metals and processes. Transforming plasmonics into a practical CMOS compatible technology is becoming a pre-requisite in order to enable volume manufacturing and low-cost fabrication of plasmo-photonic PICs, but CMOS plasmonic waveguides have still not managed to reach the maturity and performance levels of their counterparts based on noble-metals.

Demarcating from noble to CMOS compatible metals, research attempts have concentrated on the investigation of copper (Cu), titanium-nitride (TiN) and aluminum (Al) based metals in order to realize plasmo-photonic waveguides and devices, reporting mainly on the plasmonic propagation losses for various wavelength bands and on the developed manufacturing processes complying with different applications constraints [7–15]. Despite the high proliferation of CMOS compatible plasmonics and the remarkable results reported in the literature, experimental evidence on the data carrying capabilities for any of the experimentally demonstrated SPP waveguides or devices relying on CMOS metals is yet unseen. Besides the efforts in reducing propagation losses in single-mode CMOS plasmonic waveguides, their signal integrity credentials in single-channel and WDM transmission schemes comprise an additional prerequisite towards addressing their potential for on-chip interconnects, where WDM forms a key-element both for higher transmission capacity as well as for routing in Network-on-Chip architectures [16–23].

Herein, we evince experimentally for the first time to the best of our knowledge, the data carrying capabilities of single mode Al based SPP waveguides at 1550 nm wavelength regime. We evaluated the Al SPP waveguides in terms of signal integrity by performing BER measurements on a WDM data transmission experiment with eight channels and an aggregated bandwidth of 200 Gb/s over a 100 μm long Al SPP waveguide, employing co-integration of the Al SPP waveguide with Si3N4 photonics. Error-free-operation at 10−9 was achieved for all the eight NRZ modulated data channels with power penalties not exceeding 0.2 dB. The plasmonic propagation length (Lspp, defined as the power decay at 1/e) was found to be 50 μm (0.087 dB/μm) at 1550 nm, which is the largest reported so far among all the single mode CMOS compatible SPP waveguides based on Al.

2. Al SPP waveguides on Si3N4 photonics

Figure 1(a) illustrates a conceptual schematic of the plasmo-photonic data transmission line that resembles an on-chip optical interconnection. The considered plasmo-photonic link comprised of a 80 nm × 7 μm (height × width) Al SPP waveguide being interfaced with Si3N4 photonics exploiting Si3N4 grating-couplers (GCs) for TM polarization [24] and a butt-coupled plasmo-photonic interface. The Al SPP waveguide is recessed in a cavity that is formed by etching in one step the 600 nm thick low-temperature-oxide (LTO), the 360 nm thick Si3N4 waveguide layer and partially the SiO2 layer. TM polarized light is coupled from a single-mode (SM) fiber to the 360 × 800 nm strip Si3N4 waveguide utilizing Si3N4 GCs. The strip photonic waveguide is then tapered linearly to a 7.5 μm wide photonic waveguide so as to provide spatial mode matching between the photonic and the SPP mode sustained by the 7 μm Al plasmonic waveguide. The width of the Al SPP waveguide was kept at 7 μm trading-off between low-plasmonic propagation losses and compact footprint. Figure 1(b) shows the cross-sectional dimensions of the employed waveguides along the direction of propagation (z-direction) as it is denoted in Fig. 1(a).

 figure: Fig. 1

Fig. 1 (a) Conceptual schematic of a plasmo-photonic WDM data transmission line comprised of an Al SPP waveguide on Si3N4 photonics resembling an on-chip optical interconnection. (b) Cross-sectional dimensions for the Si3N4 and the Al plasmonic waveguides.

Download Full Size | PDF

2.1 Design and Simulation

Figure 2(a) illustrates a cross-section view of the butt-coupled Si3N4-to-Al interface that has been designed and numerically simulated using a three-dimensional finite-difference-time-domain (3D FDTD) method form provided by a commercial available package [25]. In order to minimize the insertion loss during the transition from the photonic to the plasmonic mode we introduced a vertical offset (VO) between the facets of the tapered photonic and the plasmonic waveguides leading in this way to better overlap between their modes. Figure 2(b) shows the simulated quasi-TM profiles for the strip photonic, tapered photonic and the SPP waveguides at 1550 nm.

 figure: Fig. 2

Fig. 2 (a) Side-view of the butt-coupled Si3N4-to-Al interface. (b) Simulated mode-profiles (|Ey|) for the strip and the tapered photonic modes as well as the SPP mode at 1550 nm. (c) Simulated Si3N4-to-Al insertion loss as a function of vertical (black-squares) and longitudinal (red-circles) offset at 1550 nm. (d) Simulated plasmonic propagation loss (black-squares) and Si3N4-to-Al insertion loss (red-circles) as function of wavelength.

Download Full Size | PDF

In a first step, we varied the VO from 0 to 1 μm keeping constant the longitudinal offset (LO) at 500 nm based on our fabrication readiness and calculated the Si3N4-to-Al insertion loss at 1550 nm. After identifying the optimal VO value, we swept also the LO from 0 to 1 μm to investigate its impact on the insertion loss of the interface.

The insertion loss was determined after launching the quasi-TM mode of the tapered photonic waveguide and calculating the power that is coupled to the SPP mode. That was realized by utilizing the built-in mode expansion monitors of Lumerical Solutions software to ensure that the forward propagating power is isolated and to calculate only the power that is coupled into the SPP mode. This data was then normalized with respect to the power of the photonic mode. During our parametric analysis and for each structural parameter variation, the mode expansion monitor was settled 2 μm away from the SPP waveguide facet. The simulated Si3N4-to-Al insertion loss incorporate the plasmonic propagation losses induced by the damping of the SPP mode after a distance of 2 μm. Figure 2(c) shows the simulated Si3N4-to-Al insertion loss at 1550 nm a function of VO and LO values. The optimum VO was found at 700 nm dictating a Si3N4-to-Al insertion loss of 3.6 dB at 1550 nm with 1dB tolerance for deviations in the range of ± 300 μm, while for LO values of 500 ± 200 nm the insertion loss was maintained at 3.6 ± 0.3 dB. Figure 2(d) presents the simulated plasmonic propagation loss as well as the Si3N4-to-Al interface loss as a function of wavelength. In all simulations we have taken into account the formation of a 3 nm thick alumina layer formed on top of the Al waveguide. The refractive indices used in our simulations for the photonic waveguides and the Al based metal have been taken from the literature [7,26].

3. Fabrication and optical characterization

Standard 150 mm silicon wafers with 2.2 µm thermal oxide were used as the substrate material. The waveguide layer of 360 nm Si3N4 was deposited in a low-pressure-chemical-vapor-deposition (LPCVD) process. Optical projection lithography was used applying an i-line stepper tool for defining first marker layer and waveguides. The structure transfer has been achieved via reactive ion etching with CHF3 and He chemistry. Afterwards, 600 nm of LPCVD SiO2 were deposited as cladding material (low temperature oxide, LTO). The cladding was annealed at 1000°C for several hours in order to improve the optical properties in terms of losses due to hygroscopic properties of the oxide.

The cavity where plasmonic stripes would be fabricated was also defined by the stepper tool and etched via reactive-ion-etching (RIE) through LTO, Si3N4 and thermal oxide. In this first Al SPP waveguide fabrication effort, the targeted cavity depth was intentionally selected at 1.36 µm considering a VO of 400 nm instead of the optimal 700 nm, so as to maximize fabrication success possibilities by relying on an already established fabrication process for gold stripes [26], given also that the 300 nm deviation of the optimal VO value is expected to increase coupling losses by only 1 dB.

For the plasmonic structures, aluminum was deposited by a lift-off process using e-beam lithography, thermal evaporation of aluminum and lift-off. The e-beam lithography is performed at 20 kV acceleration voltage on a ~600 nm thick AR-P 679 PMMA resist film coated at 1500 rpm on the samples containing the cavities. The e-beam lithography alignment was based on the recognition of the markers that were previously patterned in the silicon nitride layer covered with LTO. Resist development took place in the AR 600-56 developer for 1 minute, followed by rinsing in AR600-60 for 30 s and drying with nitrogen. Before metal evaporation a descumming step was realized for 1.5 minute in an oxygen-plasma cleaner. The Al evaporation was performed in a Plassys MEB400 e-gun evaporator with 99.999% pure Al pellets from Neyco loaded in a vitrified graphite crucible. The target thickness for aluminum was 80 nm and thickness monitoring run with a quartz crystal microbalance during evaporation. The evaporation rate of Al was 0.1 nm/s. Lift-off was realized in an AR600-71 remover bath at 50°C and the chips are finally rinsed in acetone and isopropanol and blown dry with nitrogen. Figure 3 illustrates the fabrication process that was followed.

 figure: Fig. 3

Fig. 3 Fabrication process flow of the Si3N4 and the Al SPP waveguides.

Download Full Size | PDF

Firstly, we evaluated the Al plasmonic waveguides by conducting broadband optical characterization based on fiber-to-fiber (FtF) measurements and following a standard cut-back method. Optical characterization was carried out by sweeping the wavelength of a tunable-laser-source (ANDO AQ4321) from 1520 to 1575 nm, while polarization-maintaining (PM) fibers at the input of the chip were used for ensuring coupling of TM-polarized light into the Si3N4 waveguides. A highlight of the submitted mask layout presenting the test structures that has been measured is shown in Fig. 4(a). The test structures included a reference waveguide and Si3N4-to-Al interface test structures with varied plasmonic stripe length (20,50,70,100,150, 200 and 250 μm). The reference structure comprised of a 0.88 cm long straight Si3N4 waveguide with two 100 μm long linear tapers in the middle, interconnected to each other via 1 μm long and 7.5 μm wide waveguide. A scanning-electron-microscope (SEM) image of a 70 μm long Al stripe, recessed in a cavity between the Si3N4 waveguide facets, is shown in Fig. 4(b). Figure 4(c) presents the FtF loss budget over wavelength for the tested structures. Figure 4(d) presents the obtained characterization results for the plasmonic propagation losses and the Si3N4-to-Al insertion losses as a function of wavelength, being also compared with the respective numerical results. Measurements dictated a plasmonic propagation loss of 0.087 dB / μm, which translates to a plasmonic propagation length (Lspp) of 50 μm, and an Si3N4-to-Al interface loss of 4.4 ± 0.3 dB at 1550 nm being in good agreement with the simulated values. The plasmonic propagation losses as function of wavelength have been obtained performing a linear fitting process to the experimental data. The linear fitting process was based on least-squares method. To calculate the insertion loss of the Si3N4-to-Al interface the FtF losses of the reference Si3N4 waveguide structure were subtracted from the intercept values obtained by the fitting process and the resulting loss value was divided by a factor of two.

 figure: Fig. 4

Fig. 4 (a) Mask layout showing the reference waveguide and an Si3N4-to-Al interface test structure used during the optical characterization. GCs are not depicted for clarity. (b) SEM image of a 70 μm long Al plasmonic stripe recessed in a cavity formed by etching in one step LTO, Si3N4 and SiO2. (c) FtF loss budget over wavelength for the reference waveguide and the Si3N4-to-Al interface test structures with increasing Al stripe length. (d) Experimental plasmonic propagation loss of the Al plasmonic waveguide (black-squares) and the Si3N4-to-Al interface insertion loss (red-circles) as a function of wavelength. Respective simulation results for the plasmonic propagation losses (down-black triangles) as well as the Si3N4-to-Al interface losses (up-red triangles) accounting for VO of 400 nm. The error-bars correspond to the standard deviation deduced from the linear fitting process based on least-squares method.

Download Full Size | PDF

4. 200 Gb/s WDM (8 × 25 Gb/s) data transmission experiment

After the optical characterization of the fabricated structures, we carried out a 200 Gb/s WDM (8 × 25 Gb/s) data transmission experiment utilizing a 100 μm long straight Al plasmonic waveguide as a transmission line. Figure 5(a) shows the experimental setup that was used during the data transmission experiment. A distributed-feedback-laser (DFB) bank with eight individual channels was used to launch eight continuous-wave (CW) signals, equally spaced by 1.42 nm over a spectral window from 1543.88 to 1555.26 nm, into an arrayed-waveguide-grating (AWG) device in order to be multiplexed in a common optical fiber. A LiNbO3 mach-zehnder-interferometer (MZI) based modulator was utilized to modulate the multiplexed signal. A pulse-pattern-generator (PPG) clocked by a signal generator, drives the MZI modulator at 25 Gb/s with a 27-1 NRZ pseudorandom-binary-sequence (PRBS) of electrical data. The multiplexed optical signal was de-correlated after being propagated through a 3.3 km long SM fiber and being amplified by an erbium-doped-fiber-amplifier (EDFA), providing a total output power of 25 dBm. A polarization controller and a fiber based polarization-beam-splitter (PBS) with PM fiber pigtails was used to inject TM polarized light into the chip.

 figure: Fig. 5

Fig. 5 (a) The experimental setup that was used during the WDM data transmission experiment with an aggregate bandwidth of 200 Gb/s (8 × 25 NRZ Gb/s). (DFB: distributed-feedback-laser, PC: polarization-controller, AWG: arrayed-waveguide-grating, MOD: modulator, EDFA: erbium-doped-fiber-amplifier, PBS: polarization-beam-splitter, SMF: single-mode-fiber, PMF: polarization-maintaining-fiber, VOA: variable-optical-attenuator). (b), (c) and (d) eight-channel spectrum: before the chip, after the chip and just after the EDFA before the receiver, respectively. (e) BER curves and eye diagrams for each transmitted channel exhibiting error-free operation in all cases.

Download Full Size | PDF

The total FtF losses of the employed transmission line were found to be 43.5 dB at 1550 nm incorporating insertion losses of two GCs (26 dB), the propagation loss of the 0.88 cm long photonic waveguide (0.5 dB), insertion losses from two Si3N4-to-Al interfaces (9 ± 0.3 dB) and the propagation loss of the 100 μm Al plasmonic waveguide (8.5 ± 0.2 dB). The FtF losses of the employed transmission line demonstrate a flat spectral response within the eight-channel spectral region yielding similar loss budgets among the eight different channels. The WDM data stream at the output of the chip was amplified with a second EDFA and de-multiplexed into its constituent wavelengths with a second AWG Every channel was then fed to an oscilloscope and an error detector. Figures 5(b)-5(d) show the eight-channel spectrum before entering the chip, after the chip output, and after being amplified in the receiver’s EDFA, respectively. Figure 5(e) shows the BER curves obtained for eight individual channels after being transmitted through the plasmo-photonic transmission line. Back-to-back (BtB) measurements were obtained by transmitting the WDM data stream through the reference waveguide structure, that exhibited a total FtF loss of 26.5 dB at 1550 nm. Additional optical attenuation of 17.5 ± 0.5 dB was applied externally using a fiber based variable-optical-attenuator (VOA) in order to emulate the plasmonic propagation losses as well as the Si3N4-to-Al insertion losses for each channel.

Error–free operation was obtained for all channels, with a power penalty of 0.15 ± 0.05 dB for BER values at 10−9. The BER curves were obtained by measuring the BER values using a BER tester (ADSANTEC ED45 2CH), for increasing mean optical signal power levels launched at the photo-receiver and applying a fitting curve to the measured points following reported methods in the literature [27].

5. Discussion and conclusion

Following the successfully demonstration of Al SPP waveguides on a low-loss Si3N4 photonic platform providing propagating SPP modes with an Lspp of 50 μm at 1550 nm and data carrying credentials, we compare our results with those reported in the literature. In this way we benchmark the applicability of our plasmo-photonic platform in view of on-chip data transmission applications and discuss its potential exploitation. Table 1 provides an overview of the performance characteristics for SPP waveguides that have been experimentally demonstrated, so far, using CMOS compatible metals and providing propagating SPP modes. The SPP waveguides have been classified following the terminology used in the literature [28].

Tables Icon

Table 1. Comparison with other experimentally demonstrated CMOS compatible plasmonic waveguides that support propagating SPP modes. (LR: long-range, IMI: insulator-metal-insulator, DLSPP: dielectric-loaded surface-plasmon-polariton, MIM: metal-insulator-metal, CPP: channel-plasmon-polariton).

It is well known that plasmonic waveguides employing CMOS metals hold strong potential to be seamlessly co-integrated with electronics allowing in this way the simultaneous transmission of both optical and electronic signals via the same waveguide, resulting in a stronger interaction between electrons and plasmons. Towards this direction a fundamental pre-requisite is certainly the validation of the data carrying credentials of the basic waveguide platform and the analysis of its signal integrity characteristics in true-data traffic conditions. Although this property has been already addressed in several SPP waveguide configurations using noble based metals [2–6], CMOS plasmonics have been still never evaluated in true data traffic conditions, as can be easily recognized in Table 1. To this end, the Al SPP waveguides provided by our platform reveal the first experimental evidence on the data carrying capabilities of CMOS SPP waveguides and can be potentially used as the base upon which further development of functional plasmo-photonic devices for data interconnect purposes can be accomplished. For example, our platform can be potentially exploited to realize low-energy consumption thermo-optic (TO) switches [4] by replacing the noble based SPP waveguides with Al based counterparts. We note also that our Al SPP waveguides exhibit the higher Lspp among all the single mode Al SPP waveguides reported so far. Higher Lspp values via CMOS compatible plasmonic structures have been reported only for TiN based SPP waveguides at 1550 nm in long-range (LR) SPP configurations using matching oil as the waveguide cladding, yet both the sapphire substrate material and the fabrication method used do not comply with CMOS fabrication processes [12]. Cu based alternatives have been shown very recently to provide comparable Lspp values [7] with those obtained in this work, with Cu requiring, however, an additional layer to be deposited on top in order to prevent from oxidization [9]. On the contrary, Al is well known to take advantage of its native alumina layer which serves as a protective layer [29], rendering in this way Al as a material of choice in order to overcome oxidation effects without necessitating any additional deposition step.

In conclusion, we have demonstrated, for the first time to our knowledge, single mode Al SPP waveguides on a Si3N4 photonics platform providing propagating SPP modes with the largest reported Lspp of 50 μm at 1550 nm, among all the single mode Al based SPP waveguides. High-quality signal integrity characteristics have been evaluated, for the first time to our knowledge, considering CMOS compatible SPP waveguides, under a WDM enabled NRZ data traffic scenario with an aggregate bandwidth of 200 Gb/s exhibiting power penalties below 0.2 dB at 10−9. The proposed plasmo-photonic platform enables the seamless co-integration of Al based SPP waveguides with low-loss and low-cost Si3N4 introducing new perspectives towards on-chip data transmission applications.

Funding

Horizon 2020 Framework Programme (688166).

References and links

1. M. Ayata, Y. Fedoryshyn, W. Heni, B. Baeuerle, A. Josten, M. Zahner, U. Koch, Y. Salamin, C. Hoessbacher, C. Haffner, D. L. Elder, L. R. Dalton, and J. Leuthold, “High-speed plasmonic modulator in a single metal layer,” Science 358(6363), 630–632 (2017). [CrossRef]   [PubMed]  

2. C. Hoessbacher, A. Josten, B. Baeuerle, Y. Fedoryshyn, H. Hettrich, Y. Salamin, W. Heni, C. Haffner, C. Kaiser, R. Schmid, D. L. Elder, D. Hillerkuss, M. Möller, L. R. Dalton, and J. Leuthold, “Plasmonic modulator with >170 GHz bandwidth demonstrated at 100 GBd NRZ,” Opt. Express 25(3), 1762–1768 (2017). [CrossRef]   [PubMed]  

3. S. Papaioannou, D. Kalavrouziotis, K. Vyrsokinos, J.-C. Weeber, K. Hassan, L. Markey, A. Dereux, A. Kumar, S. I. Bozhevolnyi, M. Baus, T. Tekin, D. Apostolopoulos, H. Avramopoulos, and N. Pleros, “Active plasmonics in WDM traffic switching applications,” Sci. Rep. 2(1), 652 (2012). [CrossRef]   [PubMed]  

4. S. Papaioannou, K. Vyrsokinos, O. Tsilipakos, A. Pitilakis, K. Hassan, J. Weeber, L. Markey, A. Dereux, S. Bozhevolnyi, A. Miliou, E. Kriezis, and N. Pleros, “A 320 Gb/s-Throughput Capable 2x2 Silicon-Plasmonic Router Architecture for Optical Interconnects,” J. Lightwave Technol. 29(21), 3185–3195 (2011). [CrossRef]  

5. D. Kalavrouziotis, S. Papaioannou, G. Giannoulis, D. Apostolopoulos, K. Hassan, L. Markey, J.-C. Weeber, A. Dereux, A. Kumar, S. I. Bozhevolnyi, M. Baus, M. Karl, T. Tekin, O. Tsilipakos, A. Pitilakis, E. E. Kriezis, H. Avramopoulos, K. Vyrsokinos, and N. Pleros, “0.48Tb/s (12x40Gb/s) WDM transmission and high-quality thermo-optic switching in dielectric loaded plasmonics,” Opt. Express 20(7), 7655–7662 (2012). [CrossRef]   [PubMed]  

6. J. Du and J. Wang, “Design and fabrication of hybrid SPP waveguides for ultrahigh-bandwidth low-penalty terabit-scale data transmission,” Opt. Express 25(24), 30124–30134 (2017). [CrossRef]   [PubMed]  

7. J. C. Weeber, J. Arocas, O. Heintz, L. Markey, S. Viarbitskaya, G. Colas-des-Francs, K. Hammani, A. Dereux, C. Hoessbacher, U. Koch, J. Leuthold, K. Rohracher, A. L. Giesecke, C. Porschatis, T. Wahlbrink, B. Chmielak, N. Pleros, and D. Tsiokos, “Characterization of CMOS metal based dielectric loaded surface plasmon waveguides at telecom wavelengths,” Opt. Express 25(1), 394–408 (2017). [CrossRef]   [PubMed]  

8. D. Y. Fedyanin, D. I. Yakubovsky, R. V. Kirtaev, and V. S. Volkov, “Ultralow-loss CMOS copper plasmonic waveguides,” Nano Lett. 16(1), 362–366 (2016). [CrossRef]   [PubMed]  

9. V. G. Kravets, R. Jalil, Y.-J. Kim, D. Ansell, D. E. Aznakayeva, B. Thackray, L. Britnell, B. D. Belle, F. Withers, I. P. Radko, Z. Han, S. I. Bozhevolnyi, K. S. Novoselov, A. K. Geim, and A. N. Grigorenko, “Graphene-protected copper and silver plasmonics,” Sci. Rep. 4(1), 5517 (2014). [CrossRef]   [PubMed]  

10. S. Zhu, G. Q. Lo, and D. L. Kwong, “Silicon nitride based plasmonic components for CMOS back-end-of-line integration,” Opt. Express 21(20), 23376–23390 (2013). [CrossRef]   [PubMed]  

11. C. Delacour, S. Blaize, P. Grosse, J.-M. Fedeli, A. Bruyant, R. Salas-Montiel, G. Lerondel, and A. Chelnokov, “Efficient directional coupling between silicon and copper plasmonic nanoslot waveguides: Toward metal-oxide-silicon nanophotonics,” Nano Lett. 10(8), 2922–2926 (2010). [CrossRef]   [PubMed]  

12. N. Kinsey, M. Ferrera, G. V. Naik, V. E. Babicheva, V. M. Shalaev, and A. Boltasseva, “Experimental demonstration of titanium nitride plasmonic interconnects,” Opt. Express 22(10), 12238–12247 (2014). [CrossRef]   [PubMed]  

13. S. Zhu, T. Liow, G. Lo, and D. Kwong, “Fully CMOS Compatible Subwavelength Plasmonic Slot Waveguides for Si Electronic-Photonic Integrated Circuits,” in Optical Fiber Communication Conference/National Fiber Optic Engineers Conference 2011, OSA Technical Digest (CD) (Optical Society of America, 2011), paper OThV5. [CrossRef]  

14. R. Zektzer, B. Desiatov, N. Mazurski, S. I. Bozhevolnyi, and U. Levy, “Experimental demonstration of CMOS-compatible long-range dielectric-loaded surface plasmon-polariton waveguides (lr-dlsppws),” Opt. Express 22(18), 22009–22017 (2014). [CrossRef]   [PubMed]  

15. O. Lotan, C. L. C. Smith, J. Bar-David, N. A. Mortensen, A. Kristensen, and U. Levy, “Propagation of channel plasmons at the visible regime in aluminum v-groove waveguides,” ACS Photonics 3(11), 2150–2157 (2016). [CrossRef]  

16. X. Zheng, S. Lin, Y. Luo, J. Yao, G. Li, S. S. Djordjevic, J. H. Lee, H. D. Thacker, I. Shubin, K. Raj, J. E. Cunningham, and A. V. Krishnamoorthy, “Efficient WDM Laser Sources Towards Terabyte/s Silicon Photonic Interconnects,” J. Lightwave Technol. 31(24), 4142–4154 (2013). [CrossRef]  

17. G. Fan, R. Orobtchouk, B. Han, Y. Li, and H. Li, “8 x 8 wavelength router of optical network on chip,” Opt. Express 25(20), 23677–23683 (2017). [CrossRef]   [PubMed]  

18. J. Li, X. Zheng, A. V. Krishnamoorthy, and J. F. Buckwalter, “Scaling Trends for Picojoule-per-Bit WDM Photonic Interconnects in CMOS SOI and FinFET Processes,” J. Lightwave Technol. 34(11), 2730–2742 (2016). [CrossRef]  

19. D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn, “Corona: System Implications of Emerging Nanophotonic Technology,” in Proceedings of International Symposium on Computer Architecture (IEEE, 2008), pp. 153–164.

20. A. Shacham, K. Bergman, and L. P. Carloni, “Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors,” Trans. Comput. 57(9), 1246–1260 (2008). [CrossRef]  

21. S. Bahirat and S. Parischa, “METEOR: Hybrid Photonic Ring-Mesh Network-on-Chip for Multicore Architectures,” ACM Trans. Embed. Comput. Syst. 13(3), 1–33 (2014). [CrossRef]  

22. G. Gao, M. Luo, X. Li, Y. Zhang, Q. Huang, Y. Wang, X. Xiao, Q. Yang, and J. Xia, “Transmission of 2.86 Tb/s data stream in silicon subwavelength grating waveguides,” Opt. Express 25(3), 2918–2927 (2017). [CrossRef]   [PubMed]  

23. B. G. Lee, X. Chen, A. Biberman, X. Liu, I.-W. Hsieh, C.-Y. Chou, J. I. Dadap, F. Xia, W. M. J. Green, L. Sekaric, Y. A. Vlasov, R. M. Osgood, and K. Bergman, “Ultrahigh-Bandwidth Silicon Photonic Nanowire Waveguides for On-Chip Networks,” IEEE Photonics Technol. Lett. 20(6), 398–400 (2008). [CrossRef]  

24. G. Dabos, A. Manolis, A. L. Giesecke, C. Porschatis, B. Chmielak, T. Wahlbrink, N. Pleros, and D. Tsiokos, “TM grating coupler on low-loss LPCVD based Si3N4 waveguide platform,” Opt. Commun. 405, 35–38 (2017). [CrossRef]  

25. Lumerical Solutions, Inc., http://www.lumerical.com/tcad-products/mode/.

26. G. Dabos, D. Ketzaki, A. Manolis, L. Markey, J. C. Weeber, A. Dereux, A. L. Giesecke, C. Porschatis, B. Chmielak, D. Tsiokos, and N. Pleros, “Plasmonic stripes in aqueous environment co-integrated with Si3N4 photonics,” Photonics J. 10(1), 1–8 (2018). [CrossRef]  

27. D. Marcuse, “Calculation of bit-error probability for a lightwave system with optical amplifiers and post-detection Gaussian noise,” J. Lightwave Technol. 9(4), 505–513 (1991). [CrossRef]  

28. V. Sorger, R. Oulton, R. Ma, and X. Zhang, “Toward integrated plasmonic circuits,” MRS Bull. 37(08), 728–738 (2012). [CrossRef]  

29. C. Langhammer, M. Schwind, B. Kasemo, and I. Zorić, “Localized surface plasmon resonances in aluminum nanodisks,” Nano Lett. 8(5), 1461–1471 (2008). [CrossRef]   [PubMed]  

Cited By

Optica participates in Crossref's Cited-By Linking service. Citing articles from Optica Publishing Group journals and other participating publishers are listed here.

Alert me when this article is cited.


Figures (5)

Fig. 1
Fig. 1 (a) Conceptual schematic of a plasmo-photonic WDM data transmission line comprised of an Al SPP waveguide on Si3N4 photonics resembling an on-chip optical interconnection. (b) Cross-sectional dimensions for the Si3N4 and the Al plasmonic waveguides.
Fig. 2
Fig. 2 (a) Side-view of the butt-coupled Si3N4-to-Al interface. (b) Simulated mode-profiles (|Ey|) for the strip and the tapered photonic modes as well as the SPP mode at 1550 nm. (c) Simulated Si3N4-to-Al insertion loss as a function of vertical (black-squares) and longitudinal (red-circles) offset at 1550 nm. (d) Simulated plasmonic propagation loss (black-squares) and Si3N4-to-Al insertion loss (red-circles) as function of wavelength.
Fig. 3
Fig. 3 Fabrication process flow of the Si3N4 and the Al SPP waveguides.
Fig. 4
Fig. 4 (a) Mask layout showing the reference waveguide and an Si3N4-to-Al interface test structure used during the optical characterization. GCs are not depicted for clarity. (b) SEM image of a 70 μm long Al plasmonic stripe recessed in a cavity formed by etching in one step LTO, Si3N4 and SiO2. (c) FtF loss budget over wavelength for the reference waveguide and the Si3N4-to-Al interface test structures with increasing Al stripe length. (d) Experimental plasmonic propagation loss of the Al plasmonic waveguide (black-squares) and the Si3N4-to-Al interface insertion loss (red-circles) as a function of wavelength. Respective simulation results for the plasmonic propagation losses (down-black triangles) as well as the Si3N4-to-Al interface losses (up-red triangles) accounting for VO of 400 nm. The error-bars correspond to the standard deviation deduced from the linear fitting process based on least-squares method.
Fig. 5
Fig. 5 (a) The experimental setup that was used during the WDM data transmission experiment with an aggregate bandwidth of 200 Gb/s (8 × 25 NRZ Gb/s). (DFB: distributed-feedback-laser, PC: polarization-controller, AWG: arrayed-waveguide-grating, MOD: modulator, EDFA: erbium-doped-fiber-amplifier, PBS: polarization-beam-splitter, SMF: single-mode-fiber, PMF: polarization-maintaining-fiber, VOA: variable-optical-attenuator). (b), (c) and (d) eight-channel spectrum: before the chip, after the chip and just after the EDFA before the receiver, respectively. (e) BER curves and eye diagrams for each transmitted channel exhibiting error-free operation in all cases.

Tables (1)

Tables Icon

Table 1 Comparison with other experimentally demonstrated CMOS compatible plasmonic waveguides that support propagating SPP modes. (LR: long-range, IMI: insulator-metal-insulator, DLSPP: dielectric-loaded surface-plasmon-polariton, MIM: metal-insulator-metal, CPP: channel-plasmon-polariton).

Select as filters


Select Topics Cancel
© Copyright 2024 | Optica Publishing Group. All rights reserved, including rights for text and data mining and training of artificial technologies or similar technologies.