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Grating-enabled high-speed high-efficiency surface-illuminated silicon photodiodes

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Abstract

High-speed, high-efficiency silicon photodetectors play important roles in the optical communication links that are used increasingly in data centers to handle the increasing volumes of data traffic and higher bandwidths required as use of big data and cloud computing continues to grow exponentially. Monolithic integration of the optical components with signal processing electronics on a single silicon chip is of paramount importance in the drive to reduce costs and improve performance. Here we report grating-enhanced light absorption in a silicon photodiode. The absorption efficiency is determined theoretically to be as high as 77% at 850 nm for the optimal structure, which has a thin intrinsic absorption layer with a thickness of 220 nm. The fabricated devices demonstrate a high bandwidth of 11.3 GHz and improved radio-frequency output power of more than 14 dB, thus making them suitable for use in data center optical communications.

© 2021 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

Bandwidth scaling in data centers and supercomputers is driving an increasing need for high-speed short-distance optical interconnects. Low costs and high energy efficiency are critical factors in making 850 nm wavelength optical communication systems the dominant solution for provision of rack-to rack, board-to-board and chip-to-chip interconnects in both supercomputing systems and data centers [15]. Surface-illuminated silicon photodiodes (Si PDs) are essential components of 850 nm optical communication systems [6,7] because of advantages that include low cost, high density, low noise, high operating speeds, low power consumption, low packaging complexity and the possibility of integration of photonic components with silicon electronics. However, the depletion thickness requirements to enable high quantum efficiency and high operating speeds for the Si p-i-n photodiode are contradictory [8,9]. At the 850 nm wavelength, an absorption depth of 18.7 µm is required for an absorption coefficient of α = 535 /cm [10]; this corresponds to a 3 dB bandwidth of 2.14 GHz in the ideal case and could not meet the increasing speed requirements of data exchanges in supercomputing systems and data centers.

In general, the avalanche multiplication effect is the most commonly used method to improve the responsivity of high-speed Si PDs [1115], but it suffers from high noise, high operating voltages and poor linearity. The trade-off between speed and responsivity still exists for the PDs because of the time required to establish the avalanche [16]. Therefore, several alternative methods have been presented. One option to provide a compromise between the quantum efficiency and the response speed was for the light to be incident from the side, remaining parallel to the junction, via a grating coupler and a waveguide [1721]. This method offers the potential to reduce the intrinsic layer thickness and provide shorter transit times and thus higher speeds; however, this takes place at the expense of reduced quantum efficiency due to the coupling and absorption losses of the grating and the waveguide. Therefore, the theoretical coupling efficiency was 62%, but the PD’s responsivity was 0.05A/W for an incident area (i.e., the focusing grating coupler area) of 330 µm2. In addition, the light can also be trapped in the absorption layer using photonic crystals, thus increasing the effective absorption depth and simultaneously maintaining a small carrier transit distance [22]. However, the solution-based hydrogen passivation process required limited the working environment and shortened the device lifetime while epitaxial growth of the Si layer increased the device complexity and cost, thus reducing the compatibility of these devices.

This article presents a new approach to the design and fabrication of an all-silicon photodiode with high-speed performance and high efficiency at the operating wavelength of 850 nm. A vertical grating coupler was used to guide the normally incident signal light toward parallel propagation within the top silicon layer of the silicon-on-insulator (SOI) substrate. The drift electric field covers the entire coupler and extends to both sides of the grating to ensure that most of the incident light could be absorbed and that all the photo-generated carriers could be collected rapidly. The maximum absorption efficiency of the device was found to be 77%, which is approximately 66 times higher than the corresponding device without the grating. The devices were fabricated on SOI substrates using integrated circuit (IC) fabrication processes. The 3 dB bandwidth achieved was 11.3 GHz for an incident area of 2200 µm2. Because of manufacturing process errors in terms of the structural parameters, the fabricated devices have increased radio-frequency (RF) output powers of more than 14 dB at 850 nm in the 220 nm thickness of the top silicon layer.

2. Silicon IC-compatible photodiode design

Our all-silicon photodiodes were designed and fabricated using IC-compatible processes to ease very-large-scale integration (VLSI) of the devices and to take advantage of the cost reductions enabled by complementary metal-oxide-semiconductor (CMOS) technology. Figure 1(a) shows a 3D diagram of the coplanar interdigital PD fabricated for our investigation and Fig. 1(b) shows the 2D cross-sectional geometry of the PD. The PD structure was fabricated on an SOI substrate with a 220-nm-thick active layer and a 2-µm-thick buried SiO2 layer. Another 150-nm-thick SiO2 layer was grown on the surface to act as a passivation layer. Doping with P and B ions and deposition of a Ti/Al/Ni/Au metal structure was performed to form ohmic contacts to the silicon layer on both sides. Nanoscale gratings were etched into the top silicon layer, as shown in Fig. 1(d) and (e). The active region width (W) is 50 µm and the height (h) of this region is 220 nm. The finger width (LW) is 4 µm and the length of the intrinsic region (Li) is 2 µm. The number of fingers (N) is 7. The top view of the fabricated coplanar interdigital PD is shown in Fig. 1(c). The region between the electrodes is the detector area (S), which is calculated as S = W × [N × LW + (N + 1) × Li] and is calculated to be S = 2200 µm2.

 figure: Fig. 1.

Fig. 1. Silicon photodiode with grating. (a) 3D schematic of the coplanar interdigital photodiode structure with a grating on an SOI wafer. Color coded layers: blue is the n-Si region; red is the p-Si region; orange is the i-Si region; gray is the oxide layer; and yellow is the ohmic contact metal. (b) 2D cross-sectional geometry of the vertical grating coupler used in the 2D finite-difference time-domain (FDTD) simulation. (c) Top micrograph view of the high-speed interdigitated photodiode. (d) Top scanning electron micrograph view of the active region of the photodiode. (e) Cross-section image of the grating-integrated photodiodes acquired by scanning electron micrograph.

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3. Grating design for enhanced photon absorption at 850 nm

The basic grating structure is a periodic structure that contains a finite number of rectangular grating teeth. The cross-sections of the designed photodiodes are in the x-y plane and the axes are oriented in the z direction, as shown in Fig. 1(a). Figure 2 shows the grating when it is illuminated using a vertical plane wave that generates laterally propagating modes. Most of the input light is trapped in the top silicon layer of the SOI substrate and is then transferred to both sides of the grating. The initial transient time evolution from t = 0 to 80 fs is depicted in the figure for the two-dimensional periodic boundary condition. The simulation includes the SOI bottom layer in the structure. The results shown are from finite-difference time-domain (FDTD) simulations with the TE mode input, which show that the lateral waves appear around the grating and form collective lateral modes over time.

 figure: Fig. 2.

Fig. 2. Slow light in the grating-integrated PD when illuminated by a normally incident light beam at 850 nm. FDTD numerical simulations indicate the formation of lateral modes around the grating. The Ex component of the field in the grating is shown as time increases from left to right. Top row: xz plane. Bottom row: xy plane. Light illuminates the grating in the z direction. Time values from left to right: t = 10, 20, 40, 60 and 80 fs. The field spreads laterally into the Si. These simulations take the absorption characteristics of Si into account.

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Because of the coplanar interdigital structure, all light in the top layer is absorbed and generates free elections and holes, which are then transported by the transverse electric field and collected by the metal electrodes. Therefore, the absorption efficiency (AE) is AE=1−RT, where R and T are the reflectance and the transmittance of the grating coupler, respectively. Moreover, because of the light diffraction effects, the grating period (Λ), the etch depth (δ) and the duty cycle (α), which are important structural parameters of the grating, determine the distribution and the transmission path of the input light and thus further determine the values of R and T. As a result, Λ, δ and α should be designed to provide the highest possible AE [23]. To select the optimal duty cycle (defined as W/Λ, where W is the width of the grating teeth), the AE at 850 nm for the grating PD with the 220-nm-thick Si layer is calculated as a function of both Λ and δ. The simulation results are shown in Fig. 3(a) and 3(b). According to our simulations, when starting from a duty cycle of 0.5, the maximum AE is found to be approximately 62.4% when the period is equal to 292 nm and the etch depth is 121 nm.

 figure: Fig. 3.

Fig. 3. Slow light contribution to the high efficiency. Absorption (1−RT) of the active region in the top silicon layer of the SOI substrate as functions of (a) the period [Λ] and (b) the etch depth [δ] at the three duty cycles [α] of 0.4, 0.5 and 0.6 of the grating. The absorption was enhanced by the antireflection (AR) coating and the buried oxide (BOX) layer. Absorption efficiency (AE) versus thickness characteristics of the (c) BOX layer and (d) AR coating for PDs with gratings with etch depth/duty cycle/period (δ/α/Λ) values of 121 nm/0.5/292 nm at 850 nm. The peak AE exceeded 77% at a BOX layer thickness of 1.91 µm and an AR layer thickness of 200 nm. Simulated transmission values for the individual components, i.e., absorption [A], reflection [R] and transmittance [T], for (e) the optimal grating and (f) a fabricated grating in an actual photodiode.

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The AE can be enhanced further by optimizing the thicknesses of the BOX layer and the AR coating. Figure 3(c) and 3(d) illustrate the simulation results and show that the AE is dependent periodically on the thicknesses of the BOX and AR layers; constructive interference occurs at the peak point, while in contrast, destructive interference occurs at the valley point. A peak absorption value of 77.1% is acquired at a BOX layer thickness of 1.91 µm and AR layer thickness of 200 nm. Because of the occurrence of constructive interference between the reflected and input waves, the thickness periods of BOX and AR layers are both approximately λ/2n, where λ is the input wavelength and n is the refractive index of the transmission medium [24]. As a result of simulation errors, the grid structure, and the scanning steps, there is little difference between the thickness periods for these two layers.

The coupling spectrum in the top 220-nm-thick Si layer with the optimal grating is illustrated in Fig. 3(e). The simulation results show AE of 77% with a grating coupler. The maximum responsivity (R) at 850 nm would therefore be approximately 0.53 A/W [25] when using the grating. When the absorption coefficient of 535 cm−1 at 850 nm for thin-film silicon is considered, a 220-nm-thick silicon layer without a grating coupler would absorb only 1.17% of the vertically illuminated light, leading to a maximum R of 8 mA/W. Therefore, the grating PD provides improved responsivity, with a value of R that is approximately 66 times that of the PD without the grating.

Unfortunately, because of the available fabrication capabilities and the limitations of the SOI substrate structure, the actual devices are designed to have a 300 nm period, a 120 nm etching depth, a 2 µm BOX layer thickness and a 150 nm SiO2 cover layer thickness. Therefore, the AE achieved for the actual grating PDs is 36.8%, which is approximately 31 times higher than the corresponding device without the grating, as illustrated in Fig. 3(f).

4. Results and discussion

The grating-integrated photodiodes with lateral propagation modes experience enhanced photon–matter interactions and offer the potential for a higher AE than that of bulk Si. Figure 4(a) shows the current-voltage (I–V) characteristics measured for the devices with the grating (300 nm period and 120 nm etch depth) and without the grating. The dark currents of the PDs with and without the grating have similar values. This means that the passivation treatments can effectively reduce the surface leakage currents caused by the gratings. The photo-generated carriers in the heavily doped region (i.e. the p+/n+ region) have short relaxation times and low collection efficiencies. Therefore, the R of the PD without the grating is approximately 4.3 mA/W, which is approximately 1/2 of the maximum R of the 220-nm-thick silicon layer. The simulated absorption (1−RT) values depicted in Fig. 3(f) were compared with the experimentally observed R values and it was found that at zero bias, the R is approximately 20 times the corresponding value of the devices without gratings, but lower than that in the original simulation (i.e. 31 times) because of the heavily doped region. Furthermore, we see that a higher bias voltage leads to a lower responsivity gain, as illustrated in Fig. 4(a). The measured responsivity of the grating photodetectors is over 40 mA/W for the operating wavelength of 850 nm at −10 V. The doping concentration presents a Gaussian distribution caused by the ion implantation process. In the grating device, most of the p+ and n+ heavily doped regions around the surface are etched away and the light trapping effect causes most of the light to be absorbed in the low-doped region and the intrinsic region. When the bias voltage increases, the depletion region then extends to the p-type and n-type regions. The effective light absorption area of the grating-free device increases greatly with increasing voltage, but the corresponding absorption area shows only small increases for the grating device. Therefore, the responsivity gain decreases with increasing bias voltage.

 figure: Fig. 4.

Fig. 4. DC and ultrafast characteristics of the photodiodes. (a) Current–voltage (I–V) characteristics of PDs in the dark and under illumination. The grating has little effect on the dark currents of devices of the same size. The optical response of the device under a zero bias voltage is increased by 20 times by the introduction of the grating. When the bias voltage increases, the depletion region extends into the p-type and n-type regions and the effective light absorption area and the light responsivity of the grating-free device are both increased, but the response gain is reduced. (b) Measured S21 frequency response of the grating-enabled Si-PDs. When the carrier transition rate of the device reaches saturation, the bandwidths of the devices with and without the grating are both approximately 11.3 GHz. The RF output power of grating-enabled devices has increased by 14 dB.

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Figure 4(b) plots the measured S21 characteristics of the designed grating PDs and grating-free PDs with the same area of incidence of 50×44 µm2, the same input optical power and the same wavelength of 850 nm. The RF output power, i.e. the S21 parameter, of the grating device has increased by 14 dB when compared with that of the grating-free PD. In addition, when the carrier transition rate of the photo-generated carriers reaches saturation, the bandwidths of the grating and grating-free PDs are both 11.3 GHz [26]. This infers that the introduction of the grating has little effect on both the carrier transmission path and the device capacitance.

5. Conclusion

We have demonstrated a normal incidence Si grating photodiode that shows a 14 dB improvement in its RF response because of the presence of the grating on the surface of incidence and similar dark current and bandwidth values when compared with grating-free PDs. The fabrication of the grating PD does not require any epitaxial processes and the device is suitable for monolithic integration with CMOS electronic circuits. The device demonstrates responsivity that is more than 20 times higher than that of grating-free PDs for the operating wavelength of 850 nm at 0 V. Our work shows that an optical beam that is normally incident on a Si PD with the integrated grating can generate laterally propagating and stationary optical modes that provide greater interactions between the light and the Si in terms of both interaction time and length. These propagation modes increase the effective optical absorption coefficient by approximately 66 times in a 220-nm-thick Si layer while ensuring ultrafast transit times for the carriers. This approach will enable the development of efficient high-speed Si PDs that are suitable for the short-reach multimode optical data links used in data communications and computer networks.

Funding

Natural Science Foundation of Beijing Municipality (4202008).

Acknowledgment

The authors thank Prof. Y. H. Zhang in Hebei University of Technology for the support in FDTD numerical simulation software, and also acknowledge the support from the Key Laboratory of Nanodevices and Applications, Chinese Academy of Sciences.

Disclosures

The authors declare no conflicts of interest.

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Figures (4)

Fig. 1.
Fig. 1. Silicon photodiode with grating. (a) 3D schematic of the coplanar interdigital photodiode structure with a grating on an SOI wafer. Color coded layers: blue is the n-Si region; red is the p-Si region; orange is the i-Si region; gray is the oxide layer; and yellow is the ohmic contact metal. (b) 2D cross-sectional geometry of the vertical grating coupler used in the 2D finite-difference time-domain (FDTD) simulation. (c) Top micrograph view of the high-speed interdigitated photodiode. (d) Top scanning electron micrograph view of the active region of the photodiode. (e) Cross-section image of the grating-integrated photodiodes acquired by scanning electron micrograph.
Fig. 2.
Fig. 2. Slow light in the grating-integrated PD when illuminated by a normally incident light beam at 850 nm. FDTD numerical simulations indicate the formation of lateral modes around the grating. The Ex component of the field in the grating is shown as time increases from left to right. Top row: xz plane. Bottom row: xy plane. Light illuminates the grating in the z direction. Time values from left to right: t = 10, 20, 40, 60 and 80 fs. The field spreads laterally into the Si. These simulations take the absorption characteristics of Si into account.
Fig. 3.
Fig. 3. Slow light contribution to the high efficiency. Absorption (1−RT) of the active region in the top silicon layer of the SOI substrate as functions of (a) the period [Λ] and (b) the etch depth [δ] at the three duty cycles [α] of 0.4, 0.5 and 0.6 of the grating. The absorption was enhanced by the antireflection (AR) coating and the buried oxide (BOX) layer. Absorption efficiency (AE) versus thickness characteristics of the (c) BOX layer and (d) AR coating for PDs with gratings with etch depth/duty cycle/period (δ/α/Λ) values of 121 nm/0.5/292 nm at 850 nm. The peak AE exceeded 77% at a BOX layer thickness of 1.91 µm and an AR layer thickness of 200 nm. Simulated transmission values for the individual components, i.e., absorption [A], reflection [R] and transmittance [T], for (e) the optimal grating and (f) a fabricated grating in an actual photodiode.
Fig. 4.
Fig. 4. DC and ultrafast characteristics of the photodiodes. (a) Current–voltage (I–V) characteristics of PDs in the dark and under illumination. The grating has little effect on the dark currents of devices of the same size. The optical response of the device under a zero bias voltage is increased by 20 times by the introduction of the grating. When the bias voltage increases, the depletion region extends into the p-type and n-type regions and the effective light absorption area and the light responsivity of the grating-free device are both increased, but the response gain is reduced. (b) Measured S21 frequency response of the grating-enabled Si-PDs. When the carrier transition rate of the device reaches saturation, the bandwidths of the devices with and without the grating are both approximately 11.3 GHz. The RF output power of grating-enabled devices has increased by 14 dB.
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