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Abstract
In this paper, a novel low-complexity adaptive channel equalization (ACE) algorithm for digital coherent optical systems is proposed and experimentally demonstrated. We divide the conventional N-tap butterfly ACE into two N-tap polarization independent filters and a 1-tap butterfly adaptive equalization filter. The computational complexity can reduce about 40% of multiplier operations in the digital signal processing (DSP). We evaluate the effectiveness of our proposed ACE algorithm in a 10-Gb/s real-time coherent transmission platform. It is shown that our proposed ACE algorithm has similar performance as conventional ACE algorithm and better polarization tracking ability.
© 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Coherent detection with polarization division multiplexing and digital signal processing is widely used in long-haul and metro optical fiber network. Due to the capability of DSP for compensating various linear and nonlinear impairments, coherent detection technique is able to provide higher spectral efficiency, longer transmission distance, and better optical-to-signal noise ratio (OSNR) tolerance than intensity modulation/direct detection (IMDD) technique [1]. However, in some short-reach transmission scenarios such as datacenter interconnection (DCI) and fiber-to-the-home (FTTH) networks, IMDD technique is always the priority selection due to its characteristics of low cost and low complexity [2,3]. Since DSP consumes most power consumption in the coherent detection schemes, low-complexity DSP technique is highly desired in such scenarios [4–8].
In conventional coherent DSP module, the time-domain adaptive channel equalization algorithm based on 2×2 butterfly finite impulse response (FIR) filter is the most complicated part [9]. In order to reduce the complexity of ACE algorithm, frequency-domain digital chromatic dispersion compensation can be first applied before the time-domain ACE [10]. Although the number of FIR filter tap in time-domain ACE algorithm can be significantly reduced, the overall complexity is increased due to the digital transformation operation between frequency domain and time domain. A sign-sign algorithm for FIR coefficient updating has been proposed in [11], where the coefficient update operation can be simplified by keeping only the sign of the error term and the output sample. Since only the sign of the gradient is left to update the taps, multiplier operation is not required in ACE algorithm at the cost of more inverters and comparators. In [12], frequency-domain equalizer is shown to have lower complexity than time-domain equalizer when the channel length is large, which is more suitable for long-haul transmission network. Recently, a simplified ACE algorithm constituted with 1-tap butterfly FIR filter and two N-tap FIR filters is proposed in [13] (hereinafter referred to as 1-N ACE). Compared with conventional 2×2 multiple input multiple output (MIMO) ACE algorithm, the tap number of FIR filter is halved. With 40% reduction in hardware resources, the performance is comparable to conventional ACE algorithm. The effectiveness of this structure has also been further investigated to simplify and increase the tolerance of In-phase and Quadrature-phase skew by replacing the N-tap complex-valued filters with the real-valued filters [14].
In this paper, we first study the hardware resources of 1-N ACE algorithm in the parallel real-time processing system. It is found that the required number of consumed complex multipliers is large in 1-N ACE algorithm. This is mainly because the output signal of the first 1-tap butterfly filter should also be 2 samples per symbol. In order to solve this issue, we propose an ACE algorithm with reversed structure (referred to as N-1 ACE). In our proposed ACE algorithm, the first part is two independence N-tap FIR filters for linear dispersion compensation. Different from conventional constant modulus algorithm (CMA) based ACE algorithm, a new error calculation method is used in the first part. The second part is a 1-tap butterfly FIR filter for polarization de-multiplexing. Since the tap length of second filter is only 1, the down-sampling operation can be performed in the first part. Finally, we conduct an experiment to evaluate the performances of our proposed ACE algorithm in real-time mode. The experimental results show that our proposed N-1 ACE algorithm behaves better performance than previous 1-N ACE algorithm, and the performance degradation is less than 0.2 dB when compared with conventional CMA based ACE algorithm in both back to back and 60-km fiber transmission. Moreover, benefit from the 1-tap butterfly scheme, the proposed N-1 ACE algorithm shows better polarization tracking ability than the conventional ACE algorithm.
2. Proposed ACE algorithm
The schematic diagram of DSP module in coherent optical receiver is shown in Fig. 1. The received signal is mixed with a local-oscillator (LO) laser in the dual-polarization integrated coherent receiver (ICR). After optical-to-electrical conversion, the electrical signal is then sampled by four analog-to-digital converters (ADC).
In the DSP high-speed deserializer port, the high-speed serial data is converted into low-speed parallel data (assuming that the conversion ratio is 1:2M, and 2 stands for 2 samples per symbol). Therefore, the digital data can be processed in a lower clock frequency. The following pipelined logic processing mainly includes clock data recovery (CDR), ACE, frequency offset compensation, phase recovery and symbol decision.
The ACE consumes most resources in the DSP. It usually has a 2×2 butterfly structure which consists of four complex-valued N-tap FIR filters, as shown in Fig. 2(a). It can efficiently realize polarization de-multiplexing, and compensate the linear channel impairments caused by inter symbol interference (ISI), residual chromatic dispersion (CD), and polarization mode dispersion (PMD). The channel equalization process and coefficient update are expressed as:
The structure of 1-N ACE is shown in Fig. 2(b). The first part is a 1-tap butterfly FIR filter which used for polarization de-multiplexing. The second part consists of two independent N-tap FIR filters which are used for the adaptive equalization. In the first part, the channel equalization and coefficient update processes can be expressed as:
where $E_{mid}^x$ and $E_{mid}^y$ are outputs of the first part, ${\varepsilon _{1x}}$ and ${\varepsilon _{1y}}$ are the error factors. In the second part, the channel equalization and coefficient update processes can be expressed as: where ${F^x}$, ${F^y}$ are the filter coefficients of two N-tap filters. ${\varepsilon _{2x}}$ and ${\varepsilon _{2y}}$ are the error factors. Since the second part has two N-tap filters, the down sampling operation cannot be realized in the first filter. It is noted that if the input signal to the two N-tap filters has only 1 sample per symbol, the performance will be seriously degraded due to lack of enough samples. In this case, we believe the down sampling operation should be implemented in the second part. Then, the required number of complex multipliers is 2N×M + 4×2M.Figure 2(c) shows the structure of N-1 ACE algorithm. It also has two parts including two independent N-tap FIR filters and 1-tap butterfly FIR filter. However, the digital signals first enter into the two independent N-tap FIR filters. In this case, the equalization process and coefficient update are expressed as:
In Eq. (24), the error calculation formula is different to the previous error calculation equalization in (7), (14) or (19). We add the modulus together instead of two independent calculations. In the first part of N-1 ACE which is consisted of two independence N-tap FIR filters, the output signals are not de-multiplexed, which cannot meet the CMA condition. Based on the orthogonal of X/Y polarization in transmitter, the received signal is the projection of this orthogonal signal with rotation. The signal energy of two polarizations remain constant at the receiver side. Therefore, the Eq. (24) can be adopted. We compare the convergence of the two algorithms by simulation.As shown in Fig. 3, it is noted that the error of Eq. (14) converges quickly but oscillates continuously, which is mainly effected by the rotation of polarization state. Although the error of Eq. (24) converges more slowly, it can maintain a smaller excess mean square error. Through the first part, the two N-tap FIR filters compensate the residual CD and mitigate the ISI of the signals in two parallel modules independently. After that, the channel equalization process and coefficient update of the second part are expressed as:
In this 1-tap butterfly FIR filter, the two-polarization signals are de-multiplexed. Since the second part is 1-tap filter, the calculation of each sample is independent of the adjacent samples. Therefore, the down sampling operation in the first filter will not cause performance degradation. The first N-tap filter can be 2M inputs and M outputs. The complex multipliers requirements for 1-tap butterfly filters can be reduced by 4×M. The total number of complex multipliers consumed by N-1 ACE algorithm is 2N×M+ 4×M.3. Real time experimental demonstration
A real-time experimental platform is built up to compare the performances of the three ACE algorithms in a 10-Gb/s PDM-QPSK system, as shown in Fig. 4.
At the transmitter side, a free-running tunable laser is applied, which is working at 1550 nm with linewidth of 100 KHz and output power of 13 dBm. Four independent 223-1 pseudorandom bit sequences (PRBS) are generated in a field programmable gate array (FPGA). The four binary streams at 2.5 Gb/s are then launched into the dual-polarization IQ modulator to generate optical PDM-QPSK signal. The modulated optical signal is then fed into 60-km single mode fiber (SMF) link. A polarization scrambler (Novoptel EPS1000) is connected behind the fiber to rotate the polarization of the optical signal. At the receiver side, a variable optical attenuator (VOA) is added to adjust the receiver power, which is monitored by an optical power meter. The local oscillator laser is also operated at 1550 nm with linewidth of 100 kHz and output power of 13 dBm. The optical signal is collected by an ICR and sampled twice per symbol by four ADCs (E2V EV8AQ160, 8 bits resolution), with sampling rate of 5 GSa/s. The sampling rate is fine-adjusted by a voltage controlled oscillator (VCO) controlled by FPGA. Finally, the digital signals are processed inside the FPGA (Altera 5SGSMD8K). The electrical boards of the real-time coherent optical transmission module are also shown in the inset of Fig. 4.
The internal clock inside the FPGA is 156.25 MHz which is recovered by CDR module based on Gardner algorithm. By this clock as reference, each ADC output serial signals at 5 GSa/s can be de-serialized into 32 tributary parallel channels. The signals of two ADCs are composed to form one complex IQ data. Therefore, 32×2 channels complex data from X and Y polarizations will then enter into the ACE module at each 156.25 MHz clock. After ACE processing, 16×2 tributary output data (1 sample per symbol) is obtained and will be further processed by frequency offset compensation, phase recovery and symbol decision modules. We implement three kinds of ACE structures in FPGA to compare their performances. For the 1-N ACE, the down sampling operation in the 1-tap filter will cause performance degradation since the N-tap filter is located after the 1-tap filter. To compare the two kinds of down sampling schemes, we also implement two 1-N filter modules: down sampling at 1-tap butterfly filter and down sampling at N-tap filter (represented as 1- N(2M) and 1-N(M)). For the four different ACE algorithms, Table 1 shows the complex multipliers consumed in M parallel channels.
Table 1. Required complex multipliers
Since the cost of a multiplier is much higher than an adder, the computational complexity of the ACE algorithms is characterized by the number of multipliers. We mainly consider the parallel algorithm in the real-time processing system with 2 samples per symbol. The computational complexity comparison is shown in Table 1. When the tap length is N and the input parallel processing channel number is M, the required complex multipliers number of 1-N(2M) scheme is 2N×M + 4×2M, and the number of 1-N(M) and N-1 scheme is 2N×M+ 4×M. It is noted that the 1-N(2M) scheme need 4M more complex multipliers than the N-1 scheme. Therefore, the computational complexity of N-1 scheme is lower if more parallel channel is applied. A key issue that restricts the size of M is the internal processing clock of FPGA, which is generally below 300 MHz. In our 10G coherent receiver, there are four ADCs with a sampling rate of 5 GSa/s to achieve two sample per symbol. In order to process 5 Gbps ADC sampling data, M is taken as 16. In this way, the FPGA can process 32 channels of data under the clock of 156.25 MHz. Then, we compare the performance of different tap number with conventional ACE algorithm by simulation in the condition of OSNR = 1. As shown in the Fig. 5, it is noted that, when the tap number is less than 7, increasing the tap number can significantly improve the performance. But when the tap number is greater than 7, the performance has not been significantly improved. So the tap number N is set to 7 in our experiment.
We first investigate the effects of optical receiver power to different ACE algorithms at back-to-back case, as shown in Fig. 6. For 1-N ACE algorithm, an obvious performance penalty is observed because down sampling in the first filter resulting in insufficient samples in the second filter. Compare with conventional 2×2 MIMO structure, the N-1 ACE and 1-N(2M) ACE algorithms are slightly worse with less than 0.2 dB at BER of 1.4×10−4 which is the threshold of Reed-Solomon forward error correction (RS-FEC) [15]. It is also shown that the N-1 ACE algorithm has a little higher receiver sensitivity than the 1-N(2M) ACE even though the 1-N(2M) ACE consumes 4M more complex multipliers than N-1 ACE.
Then, we compare the effects of ADC width to different ACE algorithms at back to back case. As shown in Fig. 7, we consider the case of ADC widths are 6 bits, 5 bits, and 4 bits, respectively. With the decrease of ADC accuracy, the performance of four ACE algorithms shows similar degradation trend. The N-1 and 1-N(2M) ACE algorithms have always similar performances. It can be seen that the order of filters has little effect on the overall performance. In the case of 4 bit, the performance of four algorithms has been seriously degraded. The decrease of ADC resolution will lead to the increase of quantization noise. When the ADC width is more than 5 bits, the effect of quantization noise can be improved by ACE algorithm. However, when it is reduced to 4 bits, this effect cannot be eliminated by 4 mentioned ACE algorithms.
Figure 8 shows the experimental results after 60-km transmission with the ADC resolution of 8 bits. In the transmission case, the 1-N(M) ACE algorithm again shows an obvious receiver sensitivity penalty. It is noted that the performance degradation of N-1 ACE algorithm is still less than 0.2 dB at BER of 1.4×10−4. While the degradation of 1-N ACE algorithm is above 0.5dB. Therefore, we think the proposed N-1 ACE algorithm may have the potential in the short-distance fiber transmission networks, such as datacenter interconnection or access network.
Based on the 60-km transmission system, we add polarization scrambler in the transmission link to introduce the polarization state rotation, and compare the SOP tracking performance of several different ACEs. The LiNbO3 EPS1000 polarization scrambler is constructed with 6 quarter wave plates (QWP) and 1 half wave plate (HWP). We set incommensurate rotation speeds of QWP to obtain a uniform distribution of the polarization states on the Poincaré sphere, which are 119.28, −53.57, 190.04, −100.45, 210.5, −166.07 rad/s respectively. Here, the positive and negative values indicate that the direction of rotation is forward or backward. The speed of HWP is configured to increase the test polarization rotation speed by interval of 50 Krad/s.
The results are shown in Fig. 9. By the maximum polarization tracking ability, the N-1 ACE has the best performance, which can reach up to 350 Krad/s. The conventional algorithm can achieve polarization tracking speed of 250 Krad/s, and the performance of 1-N ACE is 150 Krad/s. It is shown that the N-1 ACE has the best performance. In the range of 50-150 Krad/s, 1-N(2M) is better than the conventional structure. This result shows that, 1-tap butterfly FIR filter has a faster control ability than N-tap butterfly FIR filter in tracking polarization rotation, which is confirmed in [16]. Moreover, the N-1 ACE has better tracking ability than the 1-N ACE. This is mainly because the two independent N-tap FIR filters are applied first. The CD has been compensated before polarization de-multiplexing.
In order to know the performance in long-haul transmission, we conduct an experiment to transmit the optical signal over 200-km fiber. As shown in Fig. 10, the performance difference between algorithms becomes more obvious. Compared with the 60-km transmission, the BER increased slightly at the same receiving power. With the distance become longer, the effects of PMD and polarization dependent loss (PDL) cannot be neglected. Therefore, the performance deterioration of N-1 or 1-N ACE will be more obvious.
4. Conclusions
We propose a low-complexity ACE algorithm including two parts, N-tap FIR filter for linear channel compensation and 1-tap filter for polarization de-multiplexing. We evaluate the effectiveness of the proposed algorithm in a real-time coherent optical transmission platform based on FPGA. The real-time experimental results show that our proposed ACE algorithm has a similar performance and ADC bit width requirement as the conventional 2×2 butterfly ACE algorithm. The performance degradation is less than 0.2 dB at BER of 1.4×10−4 in both back-to-back case and 60-km fiber transmission. When the transmission distance become longer, the effects of PMD and PDL cannot be neglected. Therefore, the performance deterioration of N-1 ACE will be more obvious. Moreover, benefit from the 1-tap butterfly scheme, the proposed N-1 ACE algorithm shows better polarization tracking ability than the conventional ACE algorithm. Compared with other low-complexity ACE algorithms, the proposed ACE algorithm has both better performance and lower computational complexity.
Funding
National Natural Science Foundation of China (61805183); Natural Science Foundation of Hubei Province (2018AAA041).
Disclosures
The authors declare no conflicts of interest.
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