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Abstract
Chip-scale optical interconnects have been widely investigated using the wavelength-division multiplexing (WDM) technology, while it has been rarely reported using the mode-division multiplexing (MDM) technology that further improves communication capacity by using multiple spatial mode channels. On the other hand, to achieve large-bandwidth multi-core computing, a flexible and reconfigurable network is highly desired. Here, we proposed and demonstrated a 4 × 4 chip-scale multifunctional MDM system to realize the interconnects among 4 dual-core computing processors. The proposed system integrates fundamental components such as high-speed modulator arrays, multimode switches, and large-bandwidth photodetector arrays, in addition to various multimode devices. The thermal heaters are utilized to achieve multifunctional routing, including inter-mode and inter-path cases. The transmission of 10 Gb/s On-Off Keying (OOK) signal is verified, which demonstrates the reconfigurable inter-core and inter-processor interconnects.
© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Over the last decade, to satisfy the booming demands of transmission capacity and high-performance computing, chip-scale optical interconnects have been considered a promising solution to alleviate the bandwidth bottleneck and power scaling [1]. The silicon-on-insulator (SOI) platform has been attractive for chip-scale optical interconnects owing to high refraction index contrast and compatibility with well-established complementary metal oxide semiconductor (CMOS) processes. Advanced multiplexing technologies in chip-scale optical interconnects, such as wavelength-division multiplexing (WDM), polarization-division multiplexing (PDM) and mode-division multiplexing (MDM), have been widely utilized to radically increase the communication capacity. Silicon photonics integrated circuits (PICs) for WDM systems have gradually approached maturity from proof scheme to commercial product [2]. The MDM technology featured with lower cost and multiplexing capability of WDM systems has attracted increasing attention. However, a multifunctional MDM system integrating various multimode elements is rarely reported.
In general, a complete MDM system contains both passive and active components. The active components in the SOI platform including high-speed modulator and large-bandwidth photodetector (PD) have been well established [3–8]. The basic elements for passive components are mode multiplexers/de-multiplexers (MUXs/DEMUXs), mode-selective switches and connecting/transmitting devices for MDM. These elements have been independently designed and some simple passive architectures have been demonstrated [9–17]. By contrast, only some simple demonstrations of the MDM PIC from the system level have been reported in the past few years [18–20]. However, to achieve the high-density photonics integration with the MDM technology, the compromise for complexity and performance should be gently considered [21]. Furthermore, to satisfy the requirements of chip-scale multi-core communication, a flexible and reconfigurable design of MDM PICs is highly desired.
Here, we propose and demonstrate a fully integrated silicon multimode multiplexed network. 4 × 4 multimode inputs/outputs are designed for the possible scenario of interconnecting four computing processors, where two cores are included in each processor using the fundamental transverse electric mode (TE0) and first-order transverse electric mode (TE1). The network is constituted by high-speed micro-ring optical modulator arrays, mode MUXs/DEMUXs, optical multimode switches [22], multimode bend/crossing waveguide [23,24], and large-bandwidth germanium (Ge) PDs. By introducing the external optical carriers, it can realize on-chip data transmission and reconfigurable routing function, through parallel optical signal modulation by micro-ring modulators (MRM), mode multiplexing/de-multiplexing by adiabatic couplers (ACs), add-drop data transmission, multimode signal reconfigurable switching and parallel optical signal detection by Ge PDs. 10 Gbit/s signals are implemented for experimental demonstration, showing clear and open eye diagrams in all the switching cases.
2. Scheme design
We assume a scenario that four dual-core processors transmit and exchange data freely and independently. The schematic of the proposed system is shown in Fig. 1(a). In the system, four input (I1, I2, I3 and I4) and output (O1, O2, O3 and O4) ports correspond to 4 dual-core processors. In each processor, two optical inputs/outputs are used for two cores. The data from two cores are multiplexed onto the TE0 and TE1 modes. The structure and work principle of the AC based multiplexer is shown in Fig. 1(b). The adiabatic mode evolution gives the multiplexer the advantages of low loss and good fabrication tolerance [14]. The basic element of 4 × 4 multimode network is shown in Fig. 1(c), consisting of a pair of Mach-Zehnder interferometer-based (MZI-based) multimode switches intersecting with each other and a pair of micro-ring-based (MR-based) 2 × 2 single-mode switches. As an example, two optical signals are multiplexed onto TE0 and TE1 modes and then implemented to I3 port, as shown in Fig. 1(c). The inter-path and inter-mode switches are achieved by MR-based (MH1) and MZI-based (H1) switches, respectively. In the inter-path switch, when the MH1 is in the ON state, O4 is the output, otherwise O1 is the output. In the inter-mode switch, by controlling the phase difference between the two MZI arms, the data information carried on the two input modes can be exchanged or remain the same [25]. The 0 or π phase difference means the OFF or ON state of switch, respectively. With the help of the ultra-compact multimode bend/crossing waveguide, these devices constitute a basic element for the proposed reconfigurable MDM network. Totally, four basic switching elements are used. The MH1, MH2, MH3 and MH4 are MR-based switches. The H1, H2, H3 and H4 are MZI-based switches.
Fig. 1 (a) A schematic of the fully integrated on-chip MDM system; (b) the adiabatic couplers used as mode MUXs/DEMUXs; (c) the 2 × 2 multimode switches used in the passive network.
The AC based multiplexer is similar to the work in Ref [14]. The insertion loss and crosstalk of the referenced mode MUX/DEMUX are shown in Fig. 2(a). For the TE0 and TE1, the insertion losses are smaller than 1 dB and the crosstalk is smaller than −20 dB. In the MR-based switches, the coupling gap and radius of the MR are chosen as 0.2 and 24 μm. The Y junction is used in MZI-based multimode switches. The widths of the branch and stem parts are 0.4 and 0.8 μm, respectively. The branch is composed of two mirrored S-bends with radius and bend angle of 27.8 μm and 60°. The measured transmission spectrums of the referenced 2 × 2 multimode switches are shown in Fig. 2(b). The legend in Fig. 2(b) indicates the states of the heaters H1 and MH1. For instance, “F-O” refers to the transmission in the OFF state of MH1 (inter-path switch) and ON state of H1 (inter-mode switch). The insertion losses in different state are all smaller than 1.2 dB. The inter-path crosstalk and inter-mode crosstalk are <−16.6 and <−17 dB for all the cases.
The cross-section view of MRM is shown in Fig. 3(a), it consists of a 520 nm straight ridge waveguide and 520 nm bend waveguide with a radius of 10 μm. The P and N type doping areas across the ring waveguide form the lateral PN junction. The measured results of optical spectrum and EO bandwidth are shown in Figs. 4(a) and 4(b), respectively. The Q factor is about 13000, and the EO bandwidth is measured to be about 16 GHz. With about 4V Vpp, the MRM supports 10 Gb/s modulation (inset of Fig. 4(b)).
In the receiving part, a trade-off between the responsivity and bandwidth should be considered. The cross-section view of Ge PD is shown in Fig. 3(b). The Ge is grown on top of the P + type doped shallow etched silicon area for light absorption. The N + + type doping area is adopted on the top of Ge region, which forms the vertical PIN junction with the bottom P + type doped silicon. The width, length, and height of the Ge region are designed to be 5, 10, and 0.5 μm, respectively. The on-chip inductor is used in the Ge PD to enhance the bandwidth [26]. The measured photocurrent and bandwidth results of Ge PD are shown in Figs. 5(a) and 5(b), respectively. A responsivity of 1.09 A/W and a 3dB bandwidth larger than 48 GHz are obtained at the −3 V bias voltage. The 10 Gb/s eye diagrams inset to Fig. 5(b) show good performance of Ge PD.
3. System demonstration
The proposed MDM network is fabricated on the 220 nm thick SOI wafer with 2 μm buried oxide (BOX). The microscope image of the network is shown in Fig. 6(a). The chip is wire-bonded to the printed circuit board (PCB) for switching control. Four MRM arrays (shown in Fig. 6(b)) and four PD arrays (shown in Fig. 6(d)) are used to perform the communication among four dual-core computing processors. The MDM switches are constituted by 4 basic elements, as shown in Fig. 6(c). All the switching configurations are fully characterized. In all cases, the insertion loss is 1.5-3.0 dB, and the path-dependent loss is <0.9 dB. The measured crosstalk is < −15 dB.
Fig. 6 The microscope image of (a) the fabricated MDM system, (b) MRM array with heat control, (c) 4 × 4 multimode switches and (d) Ge PD array with on-chip inductor.
The measurement setup is shown in Fig. 7. The external light from a tunable laser is split and vertically coupled into 8 optical ports by fiber arrays. The coupling loss for each grating coupler is around 4.5 dB. The polarization controller (PC) is used to maximum the coupling efficiency. Two data streams at 10 Gbit/s with the pseudo random bit steams (PRBS) length of 215 - 1 from the bit pattern generator (BPG) are first amplified by the driver (Centellax OA4SMM4), and then loaded on the MRMs through the ground-signal-ground-signal-ground (GSGSG) probe. The detected electrical signals from the Ge PDs are collected through another GSGSG probe. The current signals from PDs are injected into the digital communication analyzer (DCA) for analysis. Meanwhile, the reverse-biased voltages for the MRM and Ge PD are applied through the bias-tees. The DC pad of the chip is wire-bonded to the PCB. Therefore, all the thermal heaters in the circuit are under the control of the external voltage source. To clarify the presentation, we show the transmission results of I3 with TE1 mode to all the outputs. The TE1 signal input from I3 port can be switched to all the output ports. The operation wavelength is set to 1554.1 nm. The reverse bias voltages of the MRM and Ge PD are −2.5 V and −3 V, respectively. With the 4V Vpp electrical modulation signal, the eye diagrams from the MRM and Ge PDs between I3→O1, I3→O2, I3→O3, and I3→O4 are shown in Fig. 8, for TE0 and TE1 modes respectively. The TE1 output signals experience the inter-path switch while the TE0 output signals experience both inter-path and inter-mode switches. The clear and open eye diagrams prove the capability of 10 Gbit/s On-Off Keying (OOK) signal transmission.
In the fabricated system, 4 × 4 switches have two degrees of freedom, including inter-mode and inter-path switching. These multifunctional switches enable the inter-core and inter-processor communication. Furthermore, due to the wavelength sensitivity of MRMs and MR-based switches, the dimension of wavelength also can be used in the system to increase the communication capacity. All phase shifters used in switches are achieved by the thermal heaters. The switching time is measured to be around 50 μs, both for the inter-path and inter-mode switches. In the experiment, no obvious thermal crosstalk was observed, as the heater number is not too large and the distance between adjacent heaters is adequate. Indeed, for larger scale circuit, the thermal crosstalk will cause some issue for simultaneous data transmission, and this can be addressed by adopting a larger gap or using a deeply etched isolation trench [27]. To be noted, no electrical amplify was used in the receiving part. The further bit-rate-error measurement can be done while Ge PDs are integrated with the transimpedance amplifiers. On the other hand, the MRM has the small extinction ratio and limited EO bandwidth to generate high-quality optical signals. The further improvement in aspect of MRM can be done to increase the whole system capacity.
4. Conclusion
In summary, we have proposed a fully integrated 4 × 4 reconfigurable MDM system. High-speed MRM arrays, reconfigurable multimode switches and large-bandwidth Ge PDs form the 10 Gbit/s interconnects for the communication among 4 dual-core processors with clear and open eye diagrams. The inter-mode and inter-path switches in our system enable the inter-core and inter-processor interconnect. Due to the wavelength sensitivity of MRMs and MR-based switches, the dimension of wavelength also can be used in the system to increase the communication capacity in the future.
Funding
National Natural Science Foundation of China (NSFC) (61775073, 6181101452); New Century Excellent Talent Project in Ministry of Education of China (NCET-13-0240); Open Fund of IPOC (BUPT) (IPOC2017B004).
References
1. C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y.-H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015). [CrossRef] [PubMed]
2. P. Dong, Y.-K. Chen, G.-H. Duan, and T. Neilson David, “Silicon photonic devices and integrated circuits,” Nanophotonics 3(4–5), 215–228 (2014).
3. G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, “Silicon optical modulators,” Nat. Photonics 4(8), 518–526 (2010). [CrossRef]
4. D. J. Thomson, F. Y. Gardes, J.-M. Fedeli, S. Zlatanovic, Y. Hu, B. P. P. Kuo, E. Myslivets, N. Alic, S. Radic, G. Z. Mashanovich, and G. T. Reed, “50-Gb/s silicon optical modulator,” IEEE Photonics Technol. Lett. 24(4), 234–236 (2012). [CrossRef]
5. G. Li, X. Zheng, J. Yao, H. Thacker, I. Shubin, Y. Luo, K. Raj, J. E. Cunningham, and A. V. Krishnamoorthy, “25Gb/s 1V-driving CMOS ring modulator with integrated thermal tuning,” Opt. Express 19(21), 20435–20443 (2011). [CrossRef] [PubMed]
6. S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-integrated high-speed MSM germanium waveguide photodetector,” Opt. Express 18(5), 4986–4999 (2010). [CrossRef] [PubMed]
7. J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetectors,” Nat. Photonics 4(8), 527–534 (2010). [CrossRef]
8. H. Chen, P. Verheyen, P. De Heyn, G. Lepage, J. De Coster, S. Balakrishnan, P. Absil, W. Yao, L. Shen, G. Roelkens, and J. Van Campenhout, “-1 V bias 67 GHz bandwidth Si-contacted germanium waveguide p-i-n photodetector for optical links at 56 Gbps and beyond,” Opt. Express 24(5), 4622–4631 (2016). [CrossRef] [PubMed]
9. H. Xu and Y. Shi, “Ultra-sharp multi-mode waveguide bending assisted with metamaterial-based mode converters,” Laser Photonics Rev. 12(3), 1700240 (2018). [CrossRef]
10. H. Xu and Y. Shi, “Metamaterial-based Maxwell’s fisheye lens for multimode waveguide crossing,” Laser Photonics Rev. 12(10), 1800094 (2018). [CrossRef]
11. S. Li, Y. Zhou, J. Dong, X. Zhang, E. Cassan, J. Hou, C. Yang, S. Chen, D. Gao, and H. Chen, “Universal multimode waveguide crossing based on transformation optics,” Optica 5(12), 1549–1556 (2018). [CrossRef]
12. Y. He, Y. Zhang, Q. Zhu, S. An, R. Cao, X. Guo, C. Qiu, and Y. Su, “Silicon high-order mode (De)multiplexer on single polarization,” J. Lightwave Technol. 36(24), 5746–5753 (2018). [CrossRef]
13. D. Dai, C. Li, S. Wang, H. Wu, Y. Shi, Z. Wu, S. Gao, T. Dai, H. Yu, and H.-K. Tsang, “10-channel mode (de)multiplexer with dual polarizations,” Laser Photonics Rev. 12(1), 1700109 (2018). [CrossRef]
14. J. Wang, Y. Xuan, M. Qi, H. Huang, Y. Li, M. Li, X. Chen, Z. Sheng, A. Wu, W. Li, X. Wang, S. Zou, and F. Gan, “Broadband and fabrication-tolerant on-chip scalable mode-division multiplexing based on mode-evolution counter-tapered couplers,” Opt. Lett. 40(9), 1956–1959 (2015). [CrossRef] [PubMed]
15. J. Wang, S. He, and D. Dai, “On-chip silicon 8-channel hybrid (de)multiplexer enabling simultaneous mode- and polarization-division-multiplexing,” Laser Photonics Rev. 8(2), L18–L22 (2014). [CrossRef]
16. L. H. Gabrielli, D. Liu, S. G. Johnson, and M. Lipson, “On-chip transformation optics for multimode waveguide bends,” Nat. Commun. 3, 1217 (2012).
17. L.-W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
18. G. Chen, Y. Yu, X. Xiao, S. Fu, and X. Zhang, “Three modes multiplexed photonic integrated circuit for large capacity optical interconnection,” in Optical Fiber Communication Conference, OSA Technical Digest (online) (Optical Society of America, 2017). [CrossRef]
19. G. Chen, Y. Yu, and X. Zhang, “Monolithically mode division multiplexing photonic integrated circuit for large-capacity optical interconnection,” Opt. Lett. 41(15), 3543–3546 (2016). [CrossRef] [PubMed]
20. G. Chen, Y. Yu, M. Ye, and X. Zhang, “Switchable in-line monitor for multi-dimensional multiplexed photonic integrated circuit,” Opt. Express 24(13), 14841–14850 (2016). [CrossRef] [PubMed]
21. Y. Yu, C. Sun, and X. Zhang, “Silicon chip-scale space-division multiplexing: from devices to system,” Sci. China Inf. Sci. 61(8), 080403 (2018). [CrossRef]
22. C. Sun, W. Wu, Y. Yu, G. Chen, X. Zhang, X. Chen, D. J. Thomson, and G. T. Reed, “De-multiplexing free on-chip low-loss multimode switch enabling reconfigurable inter-mode and inter-path routing,” Nanophotonics 7(9), 1571–1580 (2018). [CrossRef]
23. C. Sun, Y. Yu, and X. Zhang, “Ultra-compact waveguide crossing for a mode-division multiplexing optical network,” Opt. Lett. 42(23), 4913–4916 (2017). [CrossRef] [PubMed]
24. C. Sun, Y. Yu, G. Chen, and X. Zhang, “Ultra-compact bent multimode silicon waveguide with ultralow inter-mode crosstalk,” Opt. Lett. 42(15), 3004–3007 (2017). [CrossRef] [PubMed]
25. C. Sun, Y. Yu, G. Chen, and X. Zhang, “Integrated switchable mode exchange for reconfigurable mode-multiplexing optical networks,” Opt. Lett. 41(14), 3257–3260 (2016). [CrossRef] [PubMed]
26. M. Gould, T. Baehr-Jones, R. Ding, and M. Hochberg, “Bandwidth enhancement of waveguide-coupled photodetectors with inductive gain peaking,” Opt. Express 20(7), 7101–7111 (2012). [CrossRef] [PubMed]
27. L. Chen and Y. K. Chen, “Compact, low-loss and low-power 8×8 broadband silicon optical switch,” Opt. Express 20(17), 18977–18985 (2012). [CrossRef] [PubMed]
