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Abstract
Reconfigurable/reprogrammable universal silicon photonic circuits represent a paradigm shift in designing photonic devices. However, it is very challenging to perform adaptive arbitrary reconfiguration when the high-dimensional solution of phase distribution cannot be explicitly determined, especially when there are random initial phase errors, which hinder the implementation of novel potential functions in universal circuits. This work presents an arbitrary black-box reconfiguration for universal circuits with random phase errors by a bacteria-foraging algorithm and unlocks a novel function of arbitrary-port-and-arbitrary-bit-resolution reconfigurable 6-bit photonic digital-to-analog conversion. This work offers a general and efficient method to ease multipurpose reconfiguration for universal silicon photonic circuits.
© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Silicon photonic circuits are frequently used in classical and quantum applications by implementing unitary operations on optical modes, including circuit switching [1–4], photonic neural networks [5], qubit processing [6–8], quantum transport [9,10], and boson sampling [11–13]. These devices are usually designed with specific circuit topologies for specific functionalities. Recently, the development of reconfigurable/reprogrammable universal silicon photonic circuits inspired by electronic generic integrated circuits such as field programmable gate arrays offers a generic way to implement various functionalities just by reconfiguring the devices [14–22]. This concept of photonic circuits represents a paradigm shift in developing photonic devices because it can offer great system flexibility and multiple functions without updating hardware [14,16,18,21,22]. Realizing reconfiguration is at the core in operating such universal circuits. So far, three kinds of universal photonic circuits have been proposed, and thus reconfiguration based on progressive element sweeping or circuit path analysis has been done for various topologies [16,18,21,22]. However, it is still very challenging to perform arbitrary reconfiguration adaptively to achieve a desired function that cannot be determined explicitly. Upon enhancing scalability and complexity, the solutions for target functions will be high-dimensional phase distribution among all the constituent elements. It could be difficult to reach such solutions by local optical path analysis and element sweeping, especially when these elements have initial random phase errors due to fabrication imperfections. The ability to carry out arbitrary reconfiguration would greatly ease the application and operability of such large-scale complex devices and enhance system flexibility. A generic reconfiguration method capable of automated arbitrary reconfiguration is needed, which would also be beneficial for exploring novel functions. Thus, this work establishes a black-box generic algorithm, named a bacteria-foraging algorithm (BFA), to perform automated arbitrary reconfiguration to achieve arbitrary unitary transformation for universal photonic circuits with a starting state of random phase errors. In this work, this algorithm is implemented by a photonic circuit simulation, which treats the photonic circuit as a black box, accessing only the input and output ports and thus it has general topology applicability. Such a black-box algorithm has not yet been established for reconfiguring universal photonic circuits as far as we know [15]. This nature-inspired algorithm capable of automated arbitrary reconfiguration offers a general and efficient reconfiguration method to facilitate multipurpose operations for universal photonic circuits.
Unlocking novel applications is another important aspect in leveraging universal photonic circuits, and so far, functions such as circuit switching [16], couplers [16,20], and filters [18,21,22] have been demonstrated. This work presents another novel function, that of photonic digital-to-analog conversion, by reconfiguring universal photonic circuits. A photonic digital-to-analog converter (PDAC) can directly convert digital electrical signals to analog optical signals, which is indispensable for high-order modulation and arbitrary waveform generation. It is thus a promising technology for overcoming the bottlenecks encountered by electrical DACs, and it could be of benefit in reducing cost, power consumption, and system footprint. Based on the BFA-enabled reconfiguration of universal photonic circuits, a 6-bit PDAC with arbitrary-bit and arbitrary-port reconfiguration abilities can be achieved. Reconfigurable bit resolution is an important feature of electrical DACs [23], but it cannot be realized for PDACs by conventional specifically designed photonic circuits. PDACs up to 3 bits have been demonstrated [24–26]. The practical challenges to increasing the bit number for PDACs are that (1) it is difficult to realize optical power splitting in ratios of 2i (i = 0,1,2,…,n or i = 0,2,4,…,2n) for n-paths by either passive or active silicon photonic circuits because phase errors exist and accurate on-chip power monitoring inside circuits is still quite challenging, and (2) usually, the power is split equally first and then attenuated to target ratios. Thus, the optical power quickly decreases for each bit level with increasing bit number, causing large insertion loss and limiting the scalability. The proposed PDAC in this work addresses these challenges in that the proposed algorithm can automatically find the solution of phase distribution for universal circuits to implement reconfigurable 6-bit PDACs, even under random phase errors and without requiring on-chip tab-monitoring. The proposed PDAC in principle guarantees lossless operation with increasing bit number. Furthermore, this work for the first time proposes arbitrarily reconfigurable PDACs that could be used to construct novel photonic circuits. However, because it requires a high-dimensional solution of phase distribution, this reconfigurable PDAC is difficult to realize without an automated arbitrary reconfiguration algorithm. The BFA-enabled reconfiguration of universal photonic circuits offers a way to realize scalable and reconfigurable PDACs.
2. Algorithm and topology
2.1 General algorithm description
The automated algorithm implementation is sketched in Fig. 1(a), in which a photonic chip described by a unitary matrix U(ϕ1:M, ϕe) performs the linear transformation from the input light modes x to the output modes y by light propagation, as expressed by y = U·x. This photonic chip is an interferometer structure consisting of only linear passive devices such as 3-dB couplers and phase shifters having M tunable phase elements (ϕk, k = 1:M) controlled by an external driver. It also has phase errors ϕe among these elements due to unavoidable fabrication variations, especially for large-scale silicon photonic chips, which are very sensitive to fabrication accuracy [1–6,8,9,15]. Towards any desired optical evolution result y (e.g., power distribution, photon state, sampling distribution, and waveform), seeking the corresponding solutions of ϕ1:M (phase distribution in M-dimension space) is the so-called reconfiguration. The result y can be converted to electrical signals by a photodetector (PD) array via a transimpedance amplifier (TIA). The BFA engine takes these signals as input and controls ϕ1:M via the driver. The BFA pseudocode is shown in Fig. 1(b). The BFA has been explained in [27–30]; here, we simplify the algorithm by using only bacteria swimming and reproduction procedures without using elimination–dispersal and attract–repellant effects, which makes it easier to implement using programmable digital circuits as a general-purpose controller. This algorithm shows a much faster convergence speed than other common optimization algorithms [30], and it can optimize more than 1000 high-dimensional vectors. As seen in our previous study, this modified BFA is capable of calibrating phase errors for 1024 elements in a 32 × 32 circuit switch [31]. In this work, we verify the effectiveness of this modified BFA in reconfiguring photonic circuits.
Fig. 1. (a) Schematic of algorithm implementation for a universal photonic interferometer chip. ϕ1:M: M-phase elements. ϕe: phase error. PD: photodetector. TIA: transimpedance amplifiers. BFA: bacteria-foraging algorithm. (b) Pseudo-code of BFA.
One bacterium means a vector ϕk (k = 1:M), i.e., a point of M-dimension space. First, we initialize ϕk for S bacteria to ϕi,k (i = 1:S, k = 1:M) randomly. It can be replaced by the voltage vector V in actual applications if using thermo-optic phase shifters. After setting ϕk and then completing light propagation for each bacterium, we can evaluate the error δ = f(y) = f[y(ϕi,k)]. The error function f can be defined in several ways, such as max{|y − y0|}, Σ|y − y0|2, yi/Σy, only if it can be minimized or maximized. In this work, we use Σ|y − y0|2, the sum of squared residuals as the error function. Then, the algorithm enters four layers of loops, as shown in Fig. 1(b). Each bacterium first moves along a random direction vector θ with a step Δ (ϕ′i,k = ϕi,k + Δ·θ); for the new point ϕ′i,k, we evaluate the error δ. If the error decreases, another step will be moved along the same direction until the error increases or the movement times exceed the maximum allowable number (Ns). This process is called bacteria swimming. After doing the same for all bacteria, we sort the bacteria in ascending order according to their errors and replace the large-error bacteria by splitting the low-error ones. This replacement is called bacteria reproduction. A one-time run of the whole procedure is a chemotaxis loop, which is repeated until the number of chemotaxis (Nc) is finished. We execute the above iteration until the error reaches the stopping criteria (δ0). Throughout the process, the photonic chip is treated as a black box, regardless whether this algorithm is implemented in actual devices or in a circuit simulation. In other words, the algorithm loops do not interact with the device, which just accepts input and gives output; the solution of the phase vector is automatically searched by the BFA engine.
2.2 PDAC topology
The topology shown in Fig. 2 is to be reconfigured by BFA to achieve the 6-bit PDAC operation. It consists of two universal photonic circuits and a middle column of phase biases and bit input devices. Both pre- and post-universal circuits have an outer 3 × 3 matrix and an inner 2 × 2 matrix of Mach–Zehnder interferometers (MZI). We adopt the same topology of universal circuits as those in [5,17]. The bit input devices can be MZ modulators, electro-absorption modulators, or other devices that can induce extinction or switch the light to dummy ports. As a comment, this device can be designed in a 1 mm × 10 mm footprint if using several-millimeter-long silicon modulators for bit input, and the power is estimated to be <1.5 W for 6-bit operation based on typical performances of our MZ switches and silicon modulators. The actual insertion loss of this proposed device is estimated to be ∼10 dB considering 2-dB fiber coupling loss per facet based on our real device performance (one MZ switch: 0.13-dB loss; 2-mm silicon modulator: 4–5 dB loss). To achieve a desired DAC function, there are two universal photonic interferometers (ϕn,m and ϕ′n,m) and a column of phase shifters (ϕb), in total 32 phase elements, to be optimized.
Fig. 2. Proposal of a 6-bit reconfigurable PDAC consisting of two universal photonic circuits and a column of phase biases (ϕb) and bit input devices.
The device function of Fig. 2 is simulated by using the transfer matrix method. The universal photonic circuit can be described as a matrix U that is expressed as the continuous multiplication of unitary matrices Uc, Up in Eq. (1).
where Uc and Up denote the 2N × 2N unitary matrix of 3-dB couplers and phase shifters, respectively, where N is the row number of the outer matrix (N = 3 for the pre- and post-circuits in Fig. 2. Their expressions are shown by Eqs. (2) and (3), in which n, m are the row and column ids, as indicated in Fig. 2, and ϕ is the phase difference between two arms of one MZI unit (n, m). For the inner set of MZIs, the matrix elements at (0,0) and (2N,2N) in these equations should be replaced by unity. Then the topology function of Fig. 2 can be expressed as y = U′g[exp(iϕb)Ux], where g is the MZI response function. Given one phase distribution, ϕn,m, the universal circuit performs one unitary transformation on input state x. Here, the bit input devices are assumed to be MZ modulators for which the on and off states can be controlled by external electrical bit signals. This topology function is then called by the algorithm flow as a black box. It can be replaced by actual optical propagation in real devices, whereas the whole algorithm implementation remains the same. First, we randomly set initial phase errors to all MZIs and phase biases and then the algorithm is run to find the solution of phase distributions represented by phase vector ϕ (ϕn,m, ϕ′n,m, ϕb) to satisfy a target DAC output. By implementing BFA, we can automatically find the solution of phase distribution to achieve arbitrary-port and arbitrary-bit-resolution DAC operation, which is very difficult when scanning all the phase elements one by one. The results are presented in Section 3.3. Arbitrarily reconfigurable PDAC
Even though the PDAC shown in Fig. 2 is designed to 6 bits, it can support any-bit-resolution operation from 1 to 6 bits. In other words, it is bit-resolution reconfigurable. However, the phase state must be reconfigured when making bit resolution changes because if using the phase state of higher-bit resolution, the most significant bit (MSB) level cannot reach the highest optical power at lower-bit resolutions. In other words, all analog levels will undergo significant loss if applying the phase condition of the higher-bit resolution to a lower-bit resolution. This is different from the electrical DAC, which can be reconfigured to different resolutions without changing MSB levels. It is easy to understand 1- and 2-bit operations for the PDAC shown in Fig. 2 from an ideal perspective without considering phase errors. When all MZIs are on or off, the PDAC naturally supports 6 paths of 1-bit operation for a port setup of (i→i, i-input-i-output), and by simply switching some MZIs, the output port i can be changed to any port j (6 path × 1 bit mode). It can also support a 3-path × 2-bit mode, i.e., three paths of 2-bit operation between any two ports, by setting the MZIs on both sides of middle-bit input devices to 0.392π or 0.608π and the others to on or off states. However, for ≥ 3-bit resolution, it becomes difficult to explicitly determine the phase distribution solution among all elements in two interferometers and middle-phase biases because they are not of integer times of π. In addition, the 1- and 2-bit cases do not require adjustment of the middle-phase biases, which are simply kept the same even when changing the port setups; but this is no longer true for ≥ 3 bits, which requires re-adjustment of the phase distribution. In the above ideal analysis, we did not consider phase errors; actually, if random errors cause inhomogeneity, it is even difficult to determine the fully on and off conditions for 1- and 2-bit cases, and thus reconfiguration for higher-bit resolution becomes more difficult. Therefore, we intend to implement BFA to achieve arbitrary-bit resolution reconfiguration for arbitrary port setups.
First, taking the 1-input-6-output port setup (1→6) as an example, we tried to achieve DAC operation for any-bit resolution with initial random phase errors for MZIs inside two universal interferometers and phase biases ϕb. These phase errors were randomly initialized within ±0.5π. Figures 3(a) − 3(d) show the waveforms of 2, 3, 4, and 6 bits, respectively. Initially, as seen from the blue lines in these figures, the device outputs waveforms corresponding to the initial random phase errors. After optimization, these waveforms converged to correct DAC waveforms (red lines). With permuting all the bit numbers (0→2n − 1) from (0…000), (0…001), (0…010), (0…011),….., to (1…111), the analog level gradually increases. The levels are normalized to the input power. For all bit resolutions, the MSB is close to unity, indicating almost lossless operation. Because of the coherent addition, this PDAC works in linear amplitude mode, i.e., the power ratios of the bit levels in Figs. 3(a) − 3(d) follow a relation of k2/(2n − 1)2, where the bit number k = 0,1,…,2n − 1. Therefore, for a given port setup, this device can be automatically reconfigured to arbitrary-bit resolutions by BFA. Even though different random phase errors have different starting waveforms, the same DAC waveforms were achieved by the algorithm. No matter what kind of initial random phase error distribution, convergence to a target DAC waveform can be always achieved efficiently.
Fig. 3. DAC waveforms (red line) from the input port 1 to output port 6 (1→6) at various resolutions of (a) 2 bit, (b) 3 bit, (c) 4 bit, and (d) 6 bit. Blue line: initial state with random phase errors before optimization.
Second, taking the case of 6-bit operation as the example, we tried to reconfigure the DAC output from output port 6 to the others. Similar to Fig. 3(d), Figs. 4(a) and 4(b) show the same 6-bit waveform achieved for port setups (1→2) and (1→4), respectively. Even though this reconfigurable arbitrary port assignment is guaranteed in principle by topology symmetry in Fig. 2, different port assignments must be reconfigured with different phase distribution, which is usually difficult to obtain without a reconfiguration algorithm. Figures 5(a), 5(b), and 5(c) show the solutions of phase distributions of 6-bit DAC for port setups of (1→2), (1→4), and (1→6), respectively. As seen in the figures, these solutions cannot be explicitly described and are different for each port setup. In addition, when changing the state of universal photonic circuits in an on-field environment, quick and accurate adaptive reconfiguration is necessary; this work fits this purpose and offers flexibility to reconfigure photonic systems.
Fig. 4. 6-bit DAC waveforms (red lines) reconfigured to the port setup of (a) 1-input-2-output (1→2) and (b) 1-input-4-output (1→4). Blue lines: initial state with random phase errors before optimization.
Fig. 5. Phase distributions of two interferometers (ϕn,m and ϕ′n,m) and phase biases (ϕb) in the PDAC topology shown in Fig. 2 for 6-bit DAC operation under different port setups: (a) 1-input-2-output (1→2), (b) 1-input-4-output (1→4), and (c) 1-input-6-output (1→6). n: row number (=0,1,2). m: column number (=0, 1, …, 10). The position of (n = 0, m = 0) is the left-top MZI in Fig. 2.
Third, the algorithm complexity for PDAC application of the topology in Fig. 2 depends on both the total device number (N) and bit number (n). The complexity is about O(N2.86) in terms of device number and O(n1.68) in terms of bit number. As for the running time, it was about 15 s for 2-bit PDAC and less than 3 min for 6-bit PDAC in our simulation. The proposed reconfiguration scheme of PDAC by utilizing BFA supports both static and real-time dynamic reconfiguration. For real-time dynamic reconfiguration, the bandwidth depends on the bit input devices, and additional running time will be needed for real-time data analysis for eye patterns or temporal waveforms. The proposed PDAC topology and algorithm itself can support further scale extension because we have demonstrated even larger-scale silicon photonic circuits [2,3] and this algorithm can optimize >1000 elements [31], but the extension limitation of PDACs will lie in the receiver sensitivity and noise level.
Finally, we comment on the potential applications of the proposed algorithm and circuit topology beyond their use for PDACs. The algorithm can be used to calibrate phase errors for large-scale silicon photonic switches or on-chip phase arrays of optical light detection and ranging (LiDAR) systems. The potential of this algorithm includes reconfiguring silicon photonic circuits for universal transmitters, training photonic neutral networks, and reverse design for photonic components. With the help of this algorithm, the topology can be used as reconfigurable transmitters that can be adaptively configured to PAM or IQ modulators, which will be discussed in our future work.
4. Conclusion
Reconfigurable/reprogrammable universal silicon photonic circuits represent a paradigm shift in photonic device evolution because they could change the design concept of photonic systems and offer great flexibility and multifunctionality, even without updating the system hardware. Adaptive arbitrary reconfiguration for such universal circuits to achieve a desired function is the key to leveraging them in on-field reconfigurable environments, which remains very challenging as the device is scaled up for functions that cannot be explicitly determined and that take phase distribution as the high-dimensional solution, especially in the presence of random phase errors. In this work, a generic reconfiguration method based on a bacteria-foraging algorithm is proposed to perform automated black-box arbitrary reconfiguration for universal silicon photonic circuits with random initial phase errors. Based on the algorithm-enabled circuit reconfiguration, a novel function of 6-bit photonic digital-to-analog conversion with an arbitrary-port-and-arbitrary-bit-resolution reconfiguration is demonstrated, which for the first time discloses a way to realize high-bit-resolution reconfigurable digital-to-analog conversion by leveraging universal photonic circuits. This work offers a general and efficient way to facilitate multipurpose operations for universal photonic circuits.
Funding
Core Research for Evolutional Science and Technology (JPMJCR15N4).
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