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Effects of mesa etching and geometry on InGaAs/InAlAs avalanche photodiodes (APDs) were investigated by using both wet and inductively coupled plasma (ICP) etching with different mesa shapes as well as etchants. It was found that the mesa geometry had no evident impact on APDs’ characteristics regardless of the etching techniques applied. Besides, ICP-etched APDs showed faster punch-through, suppressed premature surface breakdown and lower dark current behaviors compared to the wet-etched devices. Substantially suppressed surface leakage was also observed for ICP-etched devices, showing 1 and 3 orders of magnitude better at room temperature and 77 K respectively, and over 1 order of magnitude higher surface resistivity up to 4×107 Ω cm, in comparison to the wet-etched APDs. Introduction of extra hydrogen and Ar plasma in ICP etching led to detrimental effects to APDs’ performance by enhancing the tunneling or recombination at surfaces. Those experimental results were clearly interpreted based on the surface state theories.
© 2016 Optical Society of America
1. Introduction
Surface states and their passivation have been long standing problems limiting the performance of semiconductor photodetectors. Efforts devoted on this topic cover a variety of types of mesa-type detectors including mid-infrared InAs/GaSb type-II superlattice photodiode [1–4 ], short-wave infrared In0.83Ga0.17As photodiode [5], visible Al0.8Ga0.2As avalanche photodiode (APD) [6] and ultraviolet 4H-SiC APD [7]. Mesa-isolated APDs become more susceptible to devices’ sidewall quality because surface defects or residual byproducts cause strong surface leakage current (hereafter referred to as surface leakage) under high surface electric field (E-field) [8]. Not only does surface leakage deteriorate device performance and hamper the uniformity of detector arrays but also overwhelms bulk dark current mechanisms. Unwanted effects, such as the premature surface breakdown (PSB) [9] and the surface degradation induced by charge accumulation [10] have been frequently observed in APDs. These detrimental surface effects are expected to be more severe when the mesas are scaled further down to smaller dimensions for focal plane array (FPA) pixels due to the larger perimeter to area ratio (P/A). Origin of such leakage is believed from the release of carriers trapped in the surface states such as surface dangling bonds [11], impurities [12] or structural defects [13]. These surface states can only be partially passivated but not thoroughly eliminated by depositing of dielectric layers [5] or overgrowth of higher-energy-gap semiconductor caps [1] on the mesa surfaces. Furthermore, recombination via surface states reduces the lifetime of minority carriers [3, 14] and thus compromises the responsivity of APDs. As a result, performances of mesa-type APDs, including the dark current (ID), the breakdown voltage (VB) and the gain, are readily affected by the mesa etching and passivation processes.
On the other hand, it has been implied that the mesa geometry would affect APD’s ID or breakdown characteristics via surface E-field on the mesa sidewalls or edges [9]. However, relevant experimental evidence with respect to this issue has been lacking thus far. Mesa-type separate absorption, grading, charging and multiplication (SAGCM) In0.53Ga0.47As (hereafter referred to as InGaAs) APDs with thin In0.52Al0.48As (hereafter referred to as InAlAs) multiplication layers down to 100–200 nm and low operating voltages of less than 30 V have widely been demonstrated [15–18 ], which was motivated by the better compatibility with the silicon-based read-out integrated circuits [19–23 ] and the enhanced pixel gain uniformity [17, 24] for FPA imaging. On the experimental side, studies have been conducted on mesas with either round [20, 21] or square [17, 22–24 ] shape processed by wet [15–17 , 19, 20, 24] or dry etching [22, 23], and showed diversified characteristics. Unfortunately, little attention has been paid to the relations between the device performance and the mesa geometry as well as the etching process. In order to understand the bulk gain characteristics of the APDs as well as obtain the optimal performance, it is important to maximally reduce the surface leakage. However, understanding of sidewall surface physics is of considerable difficulty because it simultaneously involves two- and three-dimensional phenomena influenced by a great number of processing related parameters. The correlation between surface state generation and etching parameters as well as the actual role of different surface states that plays in surface leakage has not been unambiguously established, especially in high E-field regime. Therefore extensive studies on the impacts of mesa etching and geometry on APD’s characteristics and the associated surface physics are highly desirable.
In this paper, we present experimental evidences of the links between the surface leakage and the mesa geometry as well as the etching in thin multiplication layer InGaAs/InAlAs APDs. While the mesa geometry showed no evident impact on the optoelectronic characteristics of APDs, the ICP-etched devices showed substantially suppressed surface leakage and different avalanche behaviors in comparison to the wet-etched ones. A clear elucidation of the surface physics behind those experimental results based on the surface state theories is also given.
2. Experimental details
Devices were processed from a SAGCM-type InGaAs/InAlAs APD structure grown on a 2-inch n+-type sulfur-doped InP(100) wafer in a VG Semicon-V80H gas-source molecular beam epitaxy system. The device architecture has been described in detail in Ref. [17] with a 150-nm-thick p-doped InAlAs (3×1016 cm− 3) multiplication layer and a 1.5-μm-thick p-doped (6×1016 cm−3) light absorption layer, which previously attained low operating voltages less than 20 V with linear gains up to 20 under top-side illumination, thanks to the thin avalanche region and optimized E-field profile. In this work, normal incidence single pixel APD samples with round shaped mesas were first fabricated along with a variable area diode array (VADA) consisting of diodes with mesa diameters ranging from 20 to 200 μm. Four different mesa delineation recipes were introduced including a wet chemical and three different ICP etching processes. Processing was initiated by photolithography and mesa definition etching which was performed in a solution of H3PO4:H2O2:H2O=1:3:6 under patterned photoresist mask for the wet chemical etching and in an ICP reactor with three different Cl2 containing etchants under patterned SiO2 mask grown by chemical vapor deposition (CVD) for the ICP etching. We used an Oxford instruments ICP-180 Etcher with ICP power of 1000 W, average RF power of 90 W, pressure of 4.0 mTorr, DC bias of 200 V, at 60°C temperature. The three different Cl2 containing etchants used were Cl2:CH4=12:10, Cl2:CH4:Ar=12:10:6 and Cl2:CH4:H2=12:10:14 (mass flow ratio, in sccm) respectively. Those four samples of round mesa hereafter were referred to as WR, DR, DRA and DRH respectively, as listed in Table 1. In order to evaluate the impact of mesa geometry on the device characteristics, two reference APD samples with square shaped mesa delineated using the same wet and ICP (Cl2:CH4=12:10) etching processes were also fabricated for comparison, and hereafter were referred to as WS and DS respectively. Following the ICP etching, all samples underwent wet chemical cleaning in H3PO4:H2O2:H2O=1:3:6 solution for 10 s to ensure pristine sidewalls. Subsequently, SiNx passivation and Ti/Pt/Au liftoff metallization techniques were applied to finish the device fabrication. The SiNx dielectric layer was deposited by using an optimized ICP-CVD process identical for all 6 samples, decoupling the joint effect of variation in passivation layers. No anti-reflection coating was applied. After processing, the top InGaAs contact layer in the photo-sensitive area was removed by dipping into a citric acid solution. Finally, the samples were mounted and the contacts were wire bonded to leadless chip carriers for further characterization.
Table 1. List on the Mesa Etching Parameters of the APD Samples and the Corresponding Device Performances Measured at RT
3. Results and discussions
The mesa geometries of the obtained devices were firstly examined by both side-view and cross-sectional scanning electron microscopy (SEM) techniques after device fabrication. Figs. 1(a)–1(d) show the 45° side-view SEM images of the wet-etched square (WS) and round (WR), and the ICP-etched square (DS) and round (DR) mesas respectively. Right panel in Fig. 1 shows cross-sectional SEM images of the mesa edges along < −110 > and < 110 > crystal orientations for corresponding mesas. DRH and DRA revealed similar mesa shape as shown in Fig. 1(d). Negative and positive sidewalls along < −110 > and < 110 > respectively, were clearly observed as a result of the selective wet chemical etching of different crystal facets in phosphoric acid. In stark contrast, ICP-etched square and round shaped mesas using the Cl2 containing etchants showed identical positive sidewalls around the mesa regardless of crystal orientations, revealing the excellent isotropic effect of plasma etching. In addition, a careful look at the cross-sectional SEM images reveals that more uniform SiNx passivation layer thickness is obtained on positive mesa sidewalls than on negative ones, possibly suggesting a better passivation of surface states and suppression of surface leakage by ICP etching.
Fig. 1 45° side-view SEM images of the wet-etched (a) square (WS) and (b) round (WR) mesas and the ICP-etched (c) square (DS) and (d) round (DR) mesas. Right panel: cross-sectional SEM images of the mesa edges along < −110 > and < 110 > crystal orientations for corresponding wet- and ICP-etched mesas
Figure 2(a) shows the bias-dependent photo current (IP) and ID curves of the square and round shaped APDs (WS, WR, DS and DR) processed by wet and ICP etching (Cl2:CH4) measured at room temperature (RT). A 1550 nm laser diode with an output power of 3 μW from a single-mode fiber was used as light source in the IP measurements. The unity-gain bias (VU) was calibrated by comparing their spectral responsivities with an InGaAs/InAlAs PIN photodiode with the same absorber thickness. The punch-through voltage (VP) and the VB were defined to be the bias where the onset of an VP plateau occurs and the bias where dark current density (JD) reaches 1 A/cm2. The gain factor (M) was calculated using M=(IP−ID)/INUP, where INUP is the net IP at the unity-gain bias. The corresponding gain-bias curves for those four APDs are also given in Fig. 2(a). Those device parameters were extracted and summarized in Table 1. Evidently, for either wet or ICP etching the square and round shaped APDs revealed nearly identical electrical characteristics, whereas the current-voltage and breakdown features of the ICP-etched APDs (DS and DR) drastically differ from their counterparts of the wet-etched devices (WS and WR). DS and DR showed much lower VP of around −1.0 V compared to the wet-etched WS and WR, which punched through at around −8.5 V. VB was notably increased from −21.1 V for WS and WR to −23.7 V for DS and DR. Moreover, the JD at 90% VB of DS and DR was reduced to less than half of that of WS and WR (Table 1). Those interesting results lead explicitly to the conclusion that neither the sidewall inclination angle nor the mesa shape has a substantial effect on the optoelectronic properties of APDs. On the other hand, electrical characteristics of APDs are highly susceptible to the mesa sidewall surface conditions generated from the wet and ICP etching processes.
Fig. 2 Photo and dark current density versus reverse bias of (a) the wet- (WS and WR) and the ICP-etched (DS and DR) APDs with both square and round mesa shapes, and (b) the ICP-etched APDs with different etchants (DRA, DRH, DR). The corresponding gain-bias curves for the APDs are also depicted. Note that the curve of DR is shown both in (a) and (b) for comparison.
IP-, ID- and gain-bias curves of the other two round shaped APDs processed by ICP etching with Ar-added etchant of Cl2:CH4:Ar (DRA) and H2-added etchant of Cl2:CH4:H2 (DRH) measured at RT are shown in Fig. 2(b). Curves of DR were again shown for comparison. Significant differences in dark and photo current as well as breakdown characteristics are clearly seen. Device parameters were also extracted and summarized in Table 1. While VB was decreased to −18.3 V for DRA and increased to −25.0 V for DRH compared to that of DR, JD at 90% VB for DRA and DRH also saw an apparently increase to about double. Furthermore, by comparing to IP of the wet-etched WS and WR, it is found that the IP multiplication of DRH was obviously suppressed until near breakdown. Similar tendency was also observed for DR but seemed less apparent. As for DRA, no obvious suppression of IP was observed. The steep increase of M can also be quantitatively characterized by the gain slope dM/dV, which were 5.2 and 6.5 at M=5 for DR and DRH respectively, much larger than the 1.3 for wet-etched WR and WS. Those results suggest on the one hand mesa surface conditions are closely related to the etchant in plasma etching and strongly affect the electrical characteristics of APDs, on the other hand, exposing to hydrogen plasma causes strong recombination of photo generated carriers at or near mesa surfaces.
In order to gain further insight into the role of surface conditions in the electrical characteristics of the devices, the VADA technique [4] is applied. The inverse of the dynamic resistance-area product (RA) at a bias of 0.8VB as a function of the ratio P/A at RT for those APDs is shown in Fig. 3(a). The surface dependence of RA can be approximated as
where (RA)bulk is the bulk RA contribution (Ω cm2), ρsurf is the surface resistivity (Ω cm). The mesa sidewall surface-dependent leakage current is directly proportional to the slope of the function given by Eq. (1). JD of the APDs is dominated by the bulk component if 1/(RA) becomes independent of the P/A ratio. To the contrary, if surface leakage is a dominant factor, then as the device dimension shrinks, the P/A ratio increases and hence 1/(RA) increases. Thus, it can be concluded from Fig. 3(a) that the leakage current in the wet-etched WS and WR is dominated by the surface leakage, while for ICP-etched DS and DR bulk component dominates the leakage current instead of surface leakage. DRA and DRH with added etchants also revealed remarkably reduced surface leakage compared to wet-etched devices but is less prominent than DR and DS. Also noteworthy is that the nearly same slopes were observed for WR and WS, DR and DS, again demonstrates the minor role of mesa geometry played in the current leakage of APDs. The vertical offsets between WR and WS and between DR and DS could be results of the variation of the input light power in different measurements. The extracted ρsurf for different devices is shown in Fig. 3(b) and is also summarized in Table 1. We found ρsurf of 35.6 and 39.3 MΩ cm for DR and DS, respectively, compared with that of some 2 MΩ cm for WR and WS, leading to about an order of magnitude larger ρsurf. The ρsurf of DRA and DRH was 8.3 and 7.7 MΩ cm respectively, less than DR and DS but still fourfold the wet-etched WS and WR. Substituting RA in Eq. (1) with RA=U/JD, the total dark current density can be expressed by where Jbulk and Jsurf are the bulk and surface current leakage component respectively. The deduced ratios of Jsurf/Jbulk of wet-etched WS and WR were around 1 10−3, whereas this figure was about an order of magnitude lower (∼1×10−4) for ICP-etched×mesas. The achieved high ρsurf as well as low Jsurf/Jbulk are clear evidences of the much reduced charge density on ICP-etched mesa sidewall surfaces than wet-etched ones after SiNx passivation [2], and demonstrate the effectiveness of ICP etching in achieving more reliable surface passivation and reducing surface leakage.Fig. 3 (a) The dependence of 1/(RA) biased at 0.8VB versus the ratio of P/A for variable area devices with different mesa shapes and etching processes at RT. (b) The extracted ρsurf and (c) the deduced ratio of Jsurf/Jbulk of different devices.
An alternative method to observe surface-related leakage is through temperature-dependent measurements of the dark current. The JD at −15 V bias are shown as a function of inverse temperature in Fig. 4(a) for both the wet- and the ICP-etched APDs. Note that the square and round mesas under the same etching process (WS/WR and DS/DR) show nearly identical temperature dependences, therefore only one of them is shown for a clearer view. Those devices exhibited a clear Arrhenius-type behavior above 200 K. By fitting the dark current density using an activation energy model with the relation of JD∝exp(−Ea/kT) (k is the Boltzmann constant, T is the temperature and Ea is the activation energy of JD), Ea far less than Eg/2 of either InGaAs or InAlAs were found in the range of 0.1–0.24 eV at T>200 K, which is a clear indication that the dominant generation mechanism of dark current is the trap-assisted tunneling (TAT) via trap states [25–27 ]. More specifically, all the ICP-etched DR, DS, DRA and DRH, showed similar Ea around 0.24 eV above 200 K, while wet-etched WS and WR revealed a much weaker temperature dependence in this temperature range with an Ea of 0.1 eV. Since all those devices are from the same APD wafer, it is reasonably to attribute the much reduced Ea of WS and WR to the significantly increased contribution from the weakly temperature-dependent leakage current along mesa sidewall surfaces [4, 25, 28]. This conclusion is also supported by our previous work showing that a very close Ea around 0.1 eV are found for wet-etched InGaAs/InAlAs APDs with a similar SAGCM architecture but varied doping densities or layer thicknesses in the avalanche region [17].
Fig. 4 Temperature-dependent JD for (a) devices with different etching processes biased at −15 V and (b) DRH biased from −10 to −21 V. The square and round mesas under the same etching processes (WS/WR and DS/DR) show nearly identical temperature dependences and therefore only one of them are shown for better viewing in (a).
At temperatures below 200 K, dark current densities of all the devices saw saturation but strikingly differ in three orders of magnitude. The saturation of the dark current in this case is not due to bulk generation-recombination, diffusion or tunneling, but comes from the mesa sidewall surface leakage as on the one hand all the devices are from the same wafer and only differ in surface conditions related to mesa etching, on the other hand bulk related dark current components will not vary in several orders of magnitude given the high material uniformity across the wafer [17]. WS and WR showed the highest surface leakage 2–3 orders of magnitude larger than DR, DRA and DRH, indicating the strongly suppressed surface leakage by ICP etching. With respect to the effects of etchant on the surface leakage in ICP etching, both DRA and DRH showed higher surface leakage than DR, possibly due to reasons similar to that at RT (see Fig. 3(c)). Incorporating of H+ or Ar+ may increase the sidewall surface charge density by forming more surface states. Furthermore, DRA showed even larger surface leakage than DRH, which is likely originated from the more surface structural defects generating by physical bombarding of Ar+ with relatively heavy ion mass.
Contrary to its weak temperature dependence, the surface leakage strongly depends on the E-fields, as shown in Fig. 4(b). The surface leakage of DRH increased by about 3 orders of magnitude with the bias increasing from −10 to −21 V at T<200 K, which is in stark contrast to the merely fivefold increase in the TAT dominated scheme at higher temperatures. This clearly suggests the surface leakage is dominated by surface E-field enhanced processes. Besides, the Ea at T>200 K decreased with increasing bias, as depicted in Fig. 4(b), which helps clarify that the dominated mechanism of TAT at this temperature range took place in the InAlAs avalanche region with strong E-field therein rather than in the InGaAs absorption layer.
Based on above experimental results and analyses, more specific elucidation addressing the surface states are given to further clarify the sidewall surface physics. Figures 5(a) and 5(b) schematically illustrate the band alignments of the acceptor- and donor-like surface states at the interfaces between the SiNx passivation layer and the p-type InAlAs multiplication layer as well as the InGaAs absorption layer. Given that identical SiNx passivation technique was applied for all six samples, the type and the density of the surface states on the mesa sidewalls are directly related to the etching process parameters.
Fig. 5 Schematic band diagrams of the surface states at the interfaces between the SiNx passivation layer and the p-type InAlAs multiplication layer as well as the InGaAs absorption layer. (a) Acceptor-like states induced by dangling bonds. (b) Donor-like states induced by adsorbed hydrogen impurity states. (FE-TAT: field enhanced trap-assisted tunneling; REC: recombination, EH: deep hydrogen defect level near surfaces)
The specific role of various types of surface state on semiconductor mesa surfaces is extremely complicated and has not been unambiguously identified in all cases, but for intrinsic dangling bonds originating from the abrupt termination of the periodic lattice on clean semiconductor surfaces it appears that acceptor-like states are formed that serve to trap electrons from either interfacial fixed charges in the passivation layer or the bulk semiconductors, and to increase the surface charge density [11, 29]. Structural defect states on GaAs surfaces caused by Ar+ bombarding during plasma etching had been proved to act as both acceptor- and donor-like states on the surfaces, depending on the bulk doping type, the RF power and the defect microstructure [13, 30]. Surface impurity defect states like H/H+ induced by adsorption of by-products from processing on the surfaces during hydrogen plasma etching were found to act as donor-like states [12]. Besides, hydrogen plasma exposure of GaAs surfaces results in passivation of surface dangling bonds [31] via hydrogenation and creation of deep defect levels near surfaces [32]. The energetic ion bombarding of hydrogen (e.g. , H+) would also penetrate into GaAs to form deep level recombination centers near surfaces [12], largely enhancing the surface recombination velocity. However, regardless their intrinsic or extrinsic nature, surface states result in overall reduced surface resistivity due to the charge accumulation or type inversion [33] at mesa surfaces. Furthermore, Fermi level at the mesa surfaces will be pinned by those surface states formed within the forbidden band gap [2] and undesired bending of the conduction or the valence bands will occur.
As illustrated in Fig. 5(a), unpassivated dangling bonds on the mesa sidewall surfaces of the p-InAlAs and the p-InGaAs regions act as acceptors. Both dark electrons and photo generated electrons diffuse and then are driven by the downward-bended band to drift towards the mesa sidewalls and are finally trapped there, forming negative charged or even type inversed surfaces. The loss of minority carriers in the bulk on the one hand slows the rise of both dark and photo current with increasing bias, on the other hand delays the bulk E-field build up in the multiplication region and therefore increase VP. Moreover, as indicated in Fig. 5(a), the surface leakage will see a significant increase at higher biases due to the fact that the large surface E-field around the InAlAs multiplication region will significantly enhance the TAT at the mesa surfaces (FE-TAT). The PSB and a reduced VB will also occur as results of the prominent FE-TAT on the surfaces. Those predicted features are consistently observed in the wet-etched samples WS and WR. From Fig. 2(a), it is evident that both ID and IP of WS and WR rose much slower with a much larger VP but lower VB compared to that of the ICP-etched DR and DS. Besides, ID of WS and WR exceeded that of DS and DR at around VP, and then increased at a much faster rate with further increase bias. Both WS and WR showed much reduced ρsurf and larger surface leakage than ICP-etched device, as shown both in Figs. 3 and 4. Moreover, the calculated voltage of full depletion of the 150-nm-thick InAlAs avalanche layer is around −1 V, which is well agreed with the measured VP of DR and DS but far smaller than that of WS and WR. Accordingly, it is reasonable to conclude that a large number of dangling bonds remain electrically active on the wet-etched mesa sidewall surfaces after SiNx passivation, and the passivation effect of SiNx on wet-etched mesas is inferior to that on ICP-etched mesas.
In regards to ICP etching, the surface states are more complicated due to the incorporation of extrinsic defect states via etchant contamination and ion bombarding. Both structural and adsorbed hydrogen defect states occurred for all the ICP-etched samples with the etchant of Cl2:CH4, while the former and the latter was significantly increased for DRA and DRH, respectively, by introducing of extra Ar/Ar+ (Cl2:CH4:Ar). Figure 5(b) depicts the schematic band diagram of the donor-like surface states formed by adsorbed hydrogen impurity states at the SiNx/p-InAlAs and SiNx/p-InGaAs interfaces of DRH. Positive charged surfaces are formed, leading to upward-bended band at the mesa surfaces. EH within the energy gap denotes the deep level recombination centers near surfaces formed by penetration of the energetic ion of hydrogen [32]. As illustrated in Fig. 5(b), minority electrons recombined at both the surface states [3, 5] and the EH [12], which was enhanced for DRH with extra H2 etchant compared to DR and DRA. The recombination of photo-generated electrons led to reduction of IP and therefore suppressed M for the APDs. As shown in Fig. 2(b) and Table 1, DRH revealed the strongest suppressed M along with the largest dM/dV of 6.5 at M=5. This detrimental effect is expected to be more severe when the mesas are scaled further down to smaller dimensions for FPA pixels [34]. On the upside, hydrogen plasma [31] helped passivate a number of dangling bonds on the mesa surfaces and effectively improved the passivation effect of SiNx, leading to strongly suppressed PSB and the largest VB of −25 V for DRH. DR showed also a slightly suppressed M due to the existence of H+ from ionized CH4 but is less apparent compared to DRH. In contrast, DRA revealed no obvious M suppression but a much lower VB of −18.3 V compared to DR and DRH with VB around −24 V, which was attributed to the enhanced FE-TAT caused by high surface structural defect state density and the associated PSB.
In addition, as listed in Table 1, the much lower ρsurf of the wet-etched mesas compared to that of the ICP-etched ones suggest that the ICP-etched mesas benefit an overall lower surface charge density, while the reduced ρsurf of DRA and DRH compared to that of DR and DS indicates increasing the extrinsic surface defect states causes higher surface charge density. However, a more rigorous quantitative interpretation of the sidewall surface leakage mechanisms is unknown and requires further investigation. Nevertheless, our results show that further improvement in the performance of III–V APDs from the etching prospect needs to include elimination of surface structural defects as well as the optimization of the H+ incorporation in order to eliminate the surface recombination.
4. Conclusion
In conclusion, we have studied the correlation between the mesa geometry as well as etching processing and the surface leakage in thin multiplication layer InGaAs/InAlAs APDs. While the mesa geometry showed no substantial impact on the electrical and optical properties of APDs, the ICP-etched devices revealed much reduced VP, increased VB, an order of magnitude higher ρsurf up to 4×107 Ω cm, and 1 and 3 orders of magnitude better surface leakage at room temperature and 77 K respectively, in comparison to the wet-etched ones. Introduction of extra hydrogen and Ar plasma in ICP etching led to detrimental effects to APDs’ performance by enhancing the FE-TAT or recombination at surfaces. Finally, surface physics behind those experimental results were clearly elucidated based on the surface state theories involving the intrinsic dangling bond, the extrinsic surface structural and impurity defect states. This study sheds a light on how to improve the performance of mesa-type detectors from the etching prospect.
Acknowledgments
This work was supported by the National Basic Research Program of China (No. 2012CB619202), the National Natural Science Foundation of China (NSFC) (Nos. 61275113 and 61405232), Shanghai Sailing Program (No. 15YF1414300), and the open project of Key Laboratory of Infrared Imaging Materials and Detectors (IIMDKFJJ-15-08), Shanghai Institute of Technical Physics, Chinese Academy of Sciences.
References and links
1. R. Rehm, M. Walther, F. Fuchs, J. Schmitz, and J. Fleissner, “Passivation of InAs/(GaIn)Sb short-period superlattice photodiodes with 10 μ m cutoff wavelength by epitaxial overgrowth with Alx Ga1−x Asy Sb1−y,” Appl. Phys. Rev. 86, 173501 (2005).
2. P. Y. Delaunay, A. Hood, B. M. Nguyen, D. Hoffman, Y. Wei, and M. Razeghi, “Passivation of type-II InAs/GaSb double heterostructure,” Appl. Phys. Lett. 91, 091112 (2007). [CrossRef]
3. G. Chen, A. M. Hoang, S. Bogdanov, A. Haddadi, S. R. Darvish, and M. Razeghi, “Effect of sidewall surface recombination on the quantum efficiency in a Y2O3 passivated gated type-II InAs/GaSb long-infrared photodetector array,” Appl. Phys. Lett. 103, 223501 (2013). [CrossRef]
4. H. S. Kim, E. Plis, A. Khoshakhlagh, S. Myers, N. Gautam, Y. D. Sharma, L. R. Dawson, S. Krishna, S. J. Lee, and S. K. Noh, “Performance improvement of InAs/GaSb strained layer superlattice detectors by reducing surface leakage currents with SU-8 passivation,” Appl. Phys. Lett. 96, 033502 (2010). [CrossRef]
5. Y. Zhou, X. L. Ji, M. Shi, H. J. Tang, X. M. Shao, X. Li, H. M. Gong, X. Cao, and F. Yan, “Impact of SiNx passivation on the surface properties of InGaAs photo-detectors,” J. Appl. Phys. 118, 034507 (2015). [CrossRef]
6. M. Ren, Y. Chen, W. Sun, X. J. Chen, E. B. Johnson, J. F. Christian, and J. C. Campbell, “Linear-and Geiger-mode characteristics of Al0.8Ga0.2As avalanche photodiodes,” IEEE Photon. Technol. Lett. 26, 2480–2483 (2014). [CrossRef]
7. X. Guo, A. L. Beck, X. Li, J. C. Campbell, D. Emerson, and J. Sumakeris, “Study of reverse dark current in 4H-SiC avalanche photodiodes,” IEEE J. Quantum Electron. 41, 562–567 (2005). [CrossRef]
8. M. Nada, Y. Muramoto, H. Yokoyama, T. Ishibashi, and H. Matsuzaki, “Triple-mesa avalanche photodiode with inverted P-down structure for reliability and stability,” IEEE J. Lightwave Technol. 32, 1543–1548 (2014). [CrossRef]
9. S. R. Forrest, R. G. Smith, and O. K. Kim, “Performance of ln0.53Ga0.47As/InP avalanche photodiodes,” IEEE J. Quantum Electron. QE-18, 2040–2048 (1982). [CrossRef]
10. H. Sudo and M. Suzuki, “Surface degradation mechanism of InP/InGaAs APDs,” J. Lightwave Technol. 6, 1496–1501 (1988). [CrossRef]
11. C. A. Mead and W. Q. Spitzer, “Fermi level position at semiconductor surfaces,” Phys. Rev. Lett. 10, 471–472 (1963). [CrossRef]
12. J. Chevallier, W. C. Dautremont-Smith, C. W. Tu, and S. J. Pearto, “Donor neutralization in GaAs(Si) by atomic hydrogen,” Appl. Phys. Lett. 47, 108–110 (1985). [CrossRef]
13. D. V. Lang, R. A. Logan, and L. C. Kimerling, “Identification of the defect state associated with a gallium vacancy in GaAs and Alx Ga1−x As,” Phys. Rev. B 15, 4874–4882 (1972). [CrossRef]
14. A. B. Sproul, “Dimensionless solution of the equation describing the effect of surface recombination on carrier decay in semiconductors,” Appl. Phys. Lett. 76, 2851–2854 (1994).
15. N. Li, R. Sidhu, X. Li, F. Ma, X. Zheng, S. Wang, G. Karve, S. Demiguel, A. L. H. Jr, and J. C. Campbell, “InGaAs/InAlAs avalanche photodiode with undepleted absorber,” Appl. Phys. Lett. 82, 2175–2177 (2003). [CrossRef]
16. M. Nada, Y. Muramoto, H. Yokoyama, N. Shigekawa, T. Ishibashi, and S. Kodama, “Inverted InAlAs/InGaAs avalanche photodiode with low-high-low electric field profile,” Jpn. J. Appl. Phys. 51, 02BG03 (2012). [CrossRef]
17. Y. J. Ma, Y. G. Zhang, Y. Gu, X. Y. Chen, S. P. Xi, B. Du, and H. Li, “Tailoring the performances of low operating voltage InAlAs/InGaAs avalanche photodetectors,” Opt. Express 23, 19278–19287 (2015). [CrossRef] [PubMed]
18. T. Nakata, I. Watanabe, K. Makita, and T. Torikai, “InAlAs avalanche photodiodes with very thin multiplication layer of 0.1 μ m for high speed and low-voltage-operation optical receiver,” Electron Lett. 36, 1807–1809 (2000). [CrossRef]
19. W. R. Clark, A. Davis, M. Roland, and K. Vaccaro, “A 1 cm × 1 cm In0.53Ga0.47As-In0.52Al0.48As avalanche photodiode array,” IEEE Photon. Technol. Lett. 18, 19–21 (2006). [CrossRef]
20. X. G. Zheng, J. S. Hsu, X. Sun, J. B. Hurst, X. Li, S. Wang, A. L. H. Jr, J. C. Campbell, A. S. Huntington, and L. A. Coldren, “A 12× 12 In0.53Ga0.47As-In0.52Al0.48As avalanche photodiode array,” IEEE J. Quantum Electron. 38, 1536–1540 (2002). [CrossRef]
21. J. C. Dries, BrianMiles, and R. Stettner, “A 32× 32 pixel FLASH laser radar system incorporating InGaAs PIN and APD detectors,” Proc. SPIE 5412, 250–256 (2004). [CrossRef]
22. F. Rutz, P. K. R. Aidam, H. Heussen, W. Bronner, A. Sieck, and M. Walther, “SWIR photodetector development at Fraunhofer IAF,” Proc. SPIE 9481, 948107 (2015). [CrossRef]
23. P. Kleinow, F. Rutz, R. Aidam, W. Bronner, H. Heussen, and M. Walther, “Optimization of InGaAs/InAlAs APDs for SWIR detection with demand for high gain and low breakdown voltage,” Proc. SPIE 9249, 92490X (2014).
24. Y. J. Ma, Y. Zhang, Y. Gu, L. Zhou, X. Y. Chen, S. Xi, and H. Li, “Low operating voltage and small gain slope of InGaAs APDs with p-type multiplication layer,” IEEE Photon. Technol. Lett. 27, 661–664 (2015). [CrossRef]
25. X. L. Ji, B. Q. Liu, H. J. Tang, X. L. Yang, X. Li, H. M. Gong, B. Shen, P. Han, and F. Yan, “2.6 μ m MBE grown InGaAs detectors with dark current of SRH and TAT,” AIP Adv. 4, 087135 (2014). [CrossRef]
26. P. N. Grillot, S. A. Ringel, and E. A. Fitzgerald, “Effect of composition on deep levels in heteroepitaxial Gex Si1−x layers and evidence for dominant intrinsic recombination-generation in relaxed Ge layers on Si,” J. Electron Mater 25, 1028C1036 (1996). [CrossRef]
27. T. Richter, G. Kühnel, W. Siegel, and J. R. Niklas, “Activation energies of the EL6 trap and of the 0.15 eV donor and their correlation in GaAs,” Semicond. Sci. Technol. 15, 1039–1044 (2000). [CrossRef]
28. E. K. Huang, D. Hoffman, B.-M. Nguyen, P.-Y. Delaunay, and M. Razeghi, “Surface leakage reduction in narrow band gap type-II antimonide-based superlattice photodiodes,” Appl. Phys. Lett. 94, 053506 (2009). [CrossRef]
29. W. E. Spicer, I. Lindau, P. Skeath, C. Y. Su, and P. Chye, “Unified mechanism for schottky-barrier formation and III–V oxide interface states,” Phys. Rev. Lett. 44, 420–423 (1980). [CrossRef]
30. O. J. Glembocki, J. A. Tuchman, K. K. Ko, S. W. Pang, A. Giordana, R. Kaplan, and C. E. Stutz, “Effects of electron cyclotron resonance etching on the ambient (100) GaAs surface,” Appl. Phys. Lett. 66, 3054–3056 (1995). [CrossRef]
31. R. A. Morrow, “Modeling the diffusion of hydrogen in GaAs,” J. Appl. Phys. 66, 2973–2979 (1989). [CrossRef]
32. H. Y. Cho, E. K. Kim, S. K. Min, J. B. Kim, and J. Jang, “Creation of deep levels in horizontal Bridgman-grown GaAs by hydrogenation,” Appl. Phys. Lett. 53, 856–858 (1988). [CrossRef]
33. H. Yin, T. X. Li, W. D. Hu, W. J. Wang, N. Li, X. S. Chen, and W. Lu, “Nonequilibrium carrier distribution in semiconductor photodetectors: surface leakage channel under illumination,” Appl. Phys. Lett. 96, 263508 (2010). [CrossRef]
34. V. Swaminathan, J. M. Freund, L. M. F. Chirovsky, T. D. Harris, N. A. Kuebler, and L. A. DAsaro, “Evidence for surface recombination at mesa sidewalls of self-electro-optic effect devices,” J. Appl. Phys. 68, 4116–4118 (1990). [CrossRef]
