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We demonstrate a compact, single-chip 40-channel, dense wavelength division multiplexing (DWDM) variable attenuator multi/demultiplexer (VMUX/DEMUX) by monolithic integration of an echelle grating and high-speed p-i-n VOA on the silicon-on-insulator (SOI) platform. The demonstrated device has a flat-top filter shape, on chip loss of 5.0dB, low PDL of 0.3dB after compensation of the polarization dependent frequency (PDF) shift, a fast attenuation response speed of 3MHz, and an area of only 25mm by 10mm.
©2011 Optical Society of America
1. Introduction
The use of reconfigurable optical add/drop multiplexing (ROADM) systems is rapidly expanding in optical networks, because this approach offers a high level of flexibility and intelligence. A compact multichannel variable optical attenuator (VOA) array integrated with multi/demultiplexer devices (VMUX/DEMUX) forms one of the key components in a ROADM system. To date, several single chip or multi-chip based devices with this functionality have been demonstrated, mainly based on the silica planar light circuit (PLC) platform [1–4]. Silica PLC based VMUX/DEMUX solutions usually suffer from a large chip size, slow attenuation speed, high power consumption and high polarization dependent loss (PDL) at high attenuation levels. To address some of these limitations, in this paper we demonstrate for the first time a compact, low loss and high speed VMUX/DEMUX on the silicon-on-insulator (SOI) platform. The SOI platform has the best understood material system, is compatible with mature silicon IC manufacturing processes, provides a broad range of functionalities and so offers a very attractive alternative approach to the development of low cost photonic components [5–9]. In this work, a high performance, 40-channel flat-top echelle grating performs the multi/demultiplexing function and is monolithically integrated with 40 solid state p-i-n current injection based VOAs that provides high-speed optical power adjustment for each channel. We have chosen to use an echelle grating because of its significant size advantage compared to an arrayed waveguide grating (AWG). A 100GHz channel spacing flat-top device with an area of 25mm x 10mm, less than 5.0dB on chip optical loss, and better than 30dB channel isolation has been demonstrated. The intrinsic PDF of the echelle grating is compensated by etching a prism shape into the slab region, and less than 0.3dB of PDL has been demonstrated. The VOA elements have low power consumption, almost no additional PDL and can operate at greater than 3MHz attenuation speed.
2. Design and fabrication
The overall mask layout of the VMUX/DEMUX device is shown in Fig. 1 . The device consists of a 40 channel echelle grating demultiplexer and an array of 40 channel VOAs. In our design, a 3 μm height silicon waveguide core size was chosen so that the device has a much better fabrication tolerance than if it were fabricated using sub-micron silicon waveguides.
Figure 2 shows a schematic of an echelle grating. The light diverges and illuminates the concave grating after entering the slab region from the input waveguide. The light is diffracted back from the grating and focused into the output waveguides. The positions of input and output waveguides follow the grating equation:
where n is the effective index of the slab waveguide, m is the operated grating order, Λ is the grating pitch, α and β are the incident and diffraction angles with respected to the normal direction of the grating curve and λ0 is the wavelength measured in vacuum. The echelle grating was designed with 100GHz channel spacing and a flat-top passband. The flat-top passband was achieved by using a 1x2 multimode interference (MMI) structure giving a double peak optical profile just before the slab region of the echelle grating [10]. The centers of the input and output arrays are set to α = 17°, β = 16.4° respectively to achieve sufficient angular dispersion. The grating diffraction order is selected as m = 16, so the loss caused by the diffraction envelop is less than 0.5dB. The grating pitch Λ is 12.3 µm, which results in grating teeth with 11.7 µm wide reflecting facets. The wide reflection facets reduce the impact on grating performance due to teeth rounding. The grating line was adjusted from a Rowland circle mounting to minimize astigmatism by using a double-stigmatic point method [11]. One of the key challenges of the echelle grating is polarization dependence caused by the birefringence in the silicon slab waveguide. The intrinsic PDF of a 3 μm silicon slab is about 35 GHz. This would cause large and unacceptable PDL for a 100GHz spacing DWDM filter. To eliminate the polarization frequency shift in the channel output, a shallow prism-shaped region was etched in the slab waveguide section to modify the slab waveguide birefringence [12,13]. The shallow etched structure refracts the TE and TM polarized light at slightly different angles such that TE and TM light will always focus at the same point on the output plane of the grating. Figure 3 shows simulation results for the PDF and transition loss dependence on the etch depth for the PDF compensation region. When the etch depth is 0.25 µm, the PDF can be reduced to almost zero while the additional loss penalty is only about 0.1dB. Although, echelle gratings have been demonstrated on various material platforms [14–16], the DWDM echelle grating filter with polarization independent performance on the SOI platform is here demonstrated for the first time.The integrated VOA array is implemented using a lateral p-i-n diode structure within the silicon waveguide [3] and is based on the free-carrier absorption effect [17]:
where λ is the wavelength measured in vacuum in units of μm. ΔNe and ΔNh are the changes in electron and hole concentrations in the waveguide, respectively. Δα is the absorption coefficient change resulting from the change in electron and hole concentrations. Optical attenuation can be controlled by current injection into the device. As the whole optical mode sees an almost uniform density of free-carriers, a silicon p-i-n based VOA has very low PDL even at very high attenuation levels. The other key advantages of a p-i-n based VOA are its small footprint, low driving power, and fast response, on the order of sub-microsecond. The echelle grating has a wavelength shift with temperature of 85 pm/Co. The deep etched thermal isolation trench is etched into the substrate to reduce the thermal crosstalk between the VOA array and the slab waveguide of the echelle grating.The device was fabricated on a 150 mm SOI wafer with a 0.375 µm buried oxide (BOX) layer using standard CMOS compatible processes. The starting silicon thickness was 3 µm and the silicon was first etched to a depth of 0.25 µm to form the prism-shaped PDF compensation region, and then the silicon was etched again to the depth of 1.2 um to form single mode ridge waveguides. The grating facets were etched down to the buried oxide layer. A 200 nm layer of high reflectivity aluminum was deposited on the grating facets. The etched grating side walls were controlled to within 1.5° from the vertical to minimize optical loss. Boron and phosphorus were diffused into the regions on either side of the waveguide to form a lateral p-i-n junction and ohmic contact areas. The doping regions are sufficiently far away from the waveguide to prevent any optical loss. The metal contacts for both p-type and n-type were formed by depositing and patterning a Ti/Al metal stack on the top of the doped areas. Finally, oxide and nitride films were deposited as waveguide cladding and passivation layers. The fabricated 40 channel VMUX/DEMUX has a very small footprint of 25 mm by 10 mm.
3. Measurement results and discussion
The fabricated device was measured using an automated measurement system. The light from a broadband amplified spontaneous emission (ASE) source was coupled to the device through a single mode fiber. The light from the output waveguide was also coupled to a single mode fiber. The transmitted power was measured by an optical spectrum analyzer (OSA). The VOA was controlled by a current source meter. Figure 4 shows the measured 40 channel spectra of the device. The losses are normalized to a nearby reference straight waveguide. The device has 100GHz channel spacing and a flat passband with a 1dB bandwidth of 50GHz. The on chip loss is less than 5.0dB. The isolation between channels is better than 30dB. The PDF is below 2.5GHz and PDL is below 0.3dB.
In Fig. 4, transmissions on channels 10, 20, 30, 40 were controlled by the VOAs. Figure 5 shows the detailed spectra when different currents were applied to the VOA on channel 40. The light can be attenuated by 20dB with about 25mA of current applied. Figure 6 shows the VOA attenuation dependence on the applied current for all 40 channels. The attenuation curves have a slight difference between 40 channels because the attenuation is wavelength dependent as predicted by the theory of the free-carrier dispersion effect in Eq. (2). Figure 7 shows the measured small signal 3dB bandwidth at 5dB attenuation level. The measured 3MHz bandwidth for this device is much faster than that of MEMS and thermal effect silica VOAs.
4. Conclusion
In conclusion, a 40 channel DWDM VMUX/DEMUX has been demonstrated by monolithic integration of an echelle grating and p-i-n attenuator on the SOI platform. The demonstrated device has a very compact size of 25mm x 10mm, low on chip loss of 4.5dB, and over 30dB channel isolation. High efficiency p-i-n current-injection based VOAs can achieve an attenuation level in excess of 20dB by application of only 20mA current and exhibit 3MHz of 3dB modulation bandwidth. The small footprint of the reported device enables a low-cost VMUX/DEMUX solution.
References and links
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