1. Introduction

The introduction of coherent reception to lightwave communication systems has dramatically increased the capacity by significantly improving the spectral efficiency through the use of multilevel modulation formats and polarization multiplexing. Coherent reception also provides additional benefits such as wavelength selectivity [1] which has significant potential in the realization of dynamic optical networks such as burst or packet switched networks that allow the bandwidth to be reconfigured on demand and provide sub wavelength granularity. In such networks the wavelength selectivity provided by the coherent reception process can be used to implement a tunable receiver that is able to quickly reconfigure the drop wavelength at an intermediate node in the network on demand [2].

A fast tuning coherent burst mode receiver was first demonstrated by Simsarian et al, using a 16 channel tunable laser and serial DSP, which allowed for the reception of one of 16 wavelength channels and was able to recover the burst data within 200 ns [3]. Recent work coherent burst mode receiver work has also shown the use of a burst header to reduce the convergence time in a burst mode coherent receiver [4] and further increases the spectral efficiency through higher order modulation formats [5].

In this work we demonstrate coherent burst mode reception using a commercially available tunable laser (TL), details of which can be found in [6, 7], and a physically realizable parallel DSP implementation for the blind recovery of 112 Gb/s DP-QPSK bursts. The parallel receiver DSP uses a 256 bit wide bus that is suitable for realization on a CMOS ASIC with a 218.75 MHz clock speed at the 28 Gbaud optical line-rate with Nyquist sampling. An initialization scheme for the digital equalizer that ensures rapid convergence of the constant modulus algorithm (CMA) under varying input conditions is introduced. The performance of the coherent burst mode receiver is experimentally characterized in a five channel 50 GHz spaced WDM system where we sequentially switch between channels to receive 4µs bursts.

2. Experimental setup

The experimental setup is shown in Fig. 1 . The WDM transmitter consists of five commercially available DFB lasers on a 50 GHz grid in the wavelength range 1551.86-1553.46 nm. The linewidth of each DFB is 500 kHz at a bias current of 110mA. The odd and even channels are separately bulk modulated with a 28 Gbaud QPSK signal where each modulator input is driven with decorrelated data streams that are derived from two interleaved 14 Gb/s 2¹⁵-1 PRBS data streams. The odd and even channels are then polarization multiplexed to create a 112 Gb/s signal before combining in a 50 GHz interleaver. An optical noise loading stage is then used to vary the OSNR before the coherent optical receiver.

 

Fig. 1 Fast tunable burst mode coherent receiver experimental setup.

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The coherent receiver local oscillator (LO) is a wavelength tunable laser (TL), (DS-DBR Oclaro [7]), which may be tuned across the c-band and provides an output power of 12 dBm. Wavelength tuning is achieved by driving the laser tuning sections directly from the output of a Tektronix arbitrary waveform generator (AWG430), which also controls the burst acquisition timing. The TL was switched by applying a series of 5 voltage steps each of duration 4 µs to the rear tuning section, such that the laser switched across the channels consecutively and then jumped back to the first channel. In addition to this two of front tuning sections were held at a constant bias. The phase tuning section was not used. Here the switching time is less than 30 ns and the linewidth ranges from 1 to 3 MHz across all the channels.

The signals are coherently detected in a polarization diverse optical hybrid with balanced photodetectors and digitally sampled at 50 GS/s using a Tektronix oscilloscope which allows for the capture of five consecutive bursts. The subsequent digital signal processing was performed offline in Matlab.

3. Digital signal processing algorithms

The digitized signals are first upsampled to two samples per symbol and then mapped on to a 256 bit wide bus after which all processing is carried out on the 256 bit blocks in parallel. In this work the burst timing control for the receiver is provided by the arbitrary waveform generator that controls the LO wavelength.

As shown in Fig. 2 the digital signal processing in a coherent receiver has to carry out the following three main functions: a) adaptive MIMO equalization to track and undo the polarization rotation and PMD that occurs in the fiber transmission channel; b) frequency offset estimation to correct for the difference in frequency between the signal carrier frequency and the LO frequency; and c) phase estimation to track and correct the phase drift between the signal carrier and the LO. In order to implement the DSP in CMOS hardware at optical line-rates of 28 Gbaud it is necessary to employ parallel DSP structures. The parallelisation of the DSP will have an impact on the rate of adaptation of the DSP tracking algorithms. This is particularly important for the MIMO equalizer adaptation as this requires feedback based control and thus the tap update rate in the parallel implementation is inversely proportional to the bus width. In the case of the frequency and phase estimators these can be implemented in a feed forward manner with does not result in a penalty for parallel operation. For burst mode operation the equalizer adaptation time is of particular importance as this determines the minimum burst length and hence granularity of the network. The performance of the frequency offset compensation is also important in the context of wavelength tunable burst mode receivers because of the fast frequency variation that arises after the wavelength switch.

 

Fig. 2 Receiver DSP functions

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In this work the CMA is used to adapt the taps weights of the MIMO equalizer. The use of a blind equalization algorithm such as the CMA is advantageous in a burst mode receiver as this reduces the feedback delay compared to using a training sequence with requires feedback from after the decision circuit. However, the CMA algorithm suffers from a singularity problem that results in the recovery of only a single signal polarization tributary for some initial polarization angles and reduced convergence speed when close to this region [3]. This is particularly problematic in a burst mode receiver where fast convergence is essential to maximize network efficiency. In a continuous receiver this problem is avoided by digitally rotating the polarization and phase until the degenerate initial equalizer condition is avoided and the both polarization data streams are correctly recovered using feedback from the output of the Forward Error Correction (FEC). In this work we use a similar approach to initialize the equalizer in that we digitally rotate the polarization and phase over a set of test angles and phases. We then choose the angle, phase and output polarization that maximizes the CMA error slope to initialize the equalizer. This choice of initial conditions ensures that the equalizer is not near the degenerate condition, where the CMA error slope is zero, and allows the CMA to rapidly converge. The initialization estimate is carried out using only the first received block after the burst trigger. The digital rotation filter $H\left(\theta ,\varphi \right)$ that is applied to the input signal block $x$ is given in Eq. (1):

The CMA error is then defined as $e\left(\theta ,\varphi \right)=1-{\left|H\left(\theta ,\varphi \right)x\right|}^2$ and the CMA error slope as $c\left(\theta ,\varphi \right)=x{\left[e\left(\theta ,\varphi \right)H\left(\theta ,\varphi \right)x\right]}^{\ast }$. The absolute value of the error slope surfaces for both the X and Y polarizations show similar features so the polarization that gives the largest magnitude of the error slope is chosen, to ensure fastest convergence. An example control surface obtained from an experimental data set over the intervals - π ≤ θ < π and −2π ≤ ϕ < 2π, is shown in Fig. 3 , for the polarization with the largest error slope. The control surface exhibits a periodicity of π in the angular direction and 4π in the phase direction. To minimize the required DSP processing overhead the implemented receiver uses 4 evenly spaced points over the intervals – π/2 ≤ θ < π/2 and -π ≤ ϕ < π, as indicated by the dashed box in Fig. 3, which requires the evaluation of only 16 test cases. The optimum angle and phase to initialize the MIMO equalizer is then determined by satisfying $\arg \underset{\theta ,\varphi }{\max }\left|c\left(\theta ,\varphi \right)\right|$. This angle and phase is then used to initialize only the central taps of the MIMO equalizer according to Eq. (1).

 

Fig. 3 Absolute value of the CMA error slope surface for an arbitrary input to the coherent receiver. The dashed line indicates the region over which the signal is rotated when determining the initial conditions for the equalizer.

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To ensure that the equalizer does not converge towards the degenerate condition the equalizer initially only optimizes for the polarization that maximized the error slope as determined in the initialization stage for the first 16 bus widths, using Equ. 1 in [8]. After this both polarizations are independently optimized using the standard CMA. The equalizer length is 30 T/2 spaced taps and produces an output at one sample per symbol. As the Equalizer and the CMA update are implemented in parallel the equalizer tap weights are only updated once per block. To ensure fast convergence a variable step size algorithm [9] having a Gaussian window is used, with the central tap having an update parameter of µ=1.

After equalization the frequency offset and carrier phase are estimated and corrected for on a block basis. Firstly the frequency offset is estimated separately for both polarizations over a single block (now 128 samples wide) using the Viterbi-Viterbi algorithm, where the data is first removed from the signals by raising to the fourth power and then the peak frequency component is identified using an FFT. In order to improve the FFT based estimate of the frequency, whose resolution is limited (218.75 MHz) by the short time window of the 128 sample block, the estimate is determined by quadratically interpolating to find the maximum frequency using three points around the peak of the calculated frequency spectrum [10]. The estimated frequency is then removed from the signals. Note that it is also necessary to keep track of the final phase from block to block to avoid introducing phase jumps between blocks. The frequency estimator used here is able to track frequency offsets up to ±1/8 of the baud rate. Secondly the average block carrier phase is estimated per polarization state using the Viterbi-Viterbi algorithm. In order to improve the robustness of the phase estimation the estimated phase is averaged over a 15 symbol sliding window.

4. Results and discussion

The performance of the coherent burst mode receiver under wavelength switched operation is shown in Fig. 4 where the results from the five recovered bursts that were captured on a single oscilloscope trace are overlaid on each other. The first column shows the initial 250 ns of the burst when the equalizer is converging and the second column shows the results across the entire 4 µs burst duration. Here the input OSNR was set to 15 dB. The estimated frequency offset, shown in Fig. 4(a), shows that there is a drift in the initial frequency of up to 1 GHz before reaching the steady state value after around 200 ns, which is readily tracked by the DSP. In this case the CMA error and the BER, shown in Fig. 4(b and c) respectively, are observed to converge within 100 ns. Note the BER shown in Fig. 4(c and d) is calculated over two blocks. However, for three of the bursts a cycle slip that results in errors is observed at around 3 µs. Cycle slips arise when the phase estimation algorithm is unable to track the variations in the phase between the LO and the transmitter lasers. For the LO and transmitter combination of a DS-DBR laser under fast tuning operation whose linewidth is 1-3 MHz and a DFB with linewidth of 500 kHz we observe occasional cycle slips within the 4 µs burst duration. The problem of cycle slips can be avoided by using differential decoding, whereby the data is encoded in the difference in phase between adjacent symbols, and the decoding is done by simply considering the phase difference between the adjacent symbols after the frequency offset is removed. Using differential decoding removes the errors caused by the cycle slips as shown in Fig. 4(d) where the differentially decoded BER is presented.

 

Fig. 4 Burst mode receiver performance for 5 consecutive bursts overlaid, in terms of (a) the estimated frequency offset, (b) the CMA error, (c) standard BER and (d) the differentially decoded BER. The left and right panels show the initial 250 ns and the entire burst, respectively.

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The BER performance of the burst receiver as a function of the received OSNR for each of the five burst channels is shown in Fig. 5 . The standard BER and the differentially decoded BER are shown in Fig. 5(a and b), respectively. The standard BER shows an implementation penalty of 1.2 to 2.2 dB for the best and worst channels, respectively, and a similar penalty is observed for the differentially decoded BER. The variation in the penalty across the channels arises mainly from the variation in the linewidth obtained at the different operating points of the DS-DBR laser [11]. The differentially decoded BER shows a 0.5 dB penalty with respect to the standard BER as expected.

 

Fig. 5 BER performance as a function of received ONSR for the five 50 GHz spaced channels under burst switched operation. The BER is shown for both standard decoding (a) and differential decoding (b). Also shown is the theoretical maximum (solid black line)

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To investigate the performance of the equalizer initialization algorithm a single five burst trace for a received OSNR of 15.5 dB was captured. This was then the digitally rotated over 16 evenly spaced steps in both polarization angle (θ) and phase (ϕ) on the intervals – π/4 ≤ θ < π/4 and –π/2 ≤ ϕ < π/2. Figure 6(a and c) show the performance over the first 300 ns of the equalizer convergence when the initialization scheme is not used and the central taps of the MIMO equalizer are set to correspond to rotation and phase angles of zero. We observe that in some cases the speed of the equalizer convergence is reduced and an error floor as a result of converging to the degenerate case is seen. Figure 6(b and d) shows the results when the CMA error slope based initialization scheme is used on the same data set. Here the equalizer converges to a squared CMA error of less than 0.25 within 150ns in all cases and the error floor is not observed.

 

Fig. 6 Performance comparison between the fixed and CMA error slope based equalizer initialisation schemes. CMA error convergence and BER with fixed (a) and (c) and CMA error slope (b) and (d) based initialization, respectively.

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7. Summary

We have implemented a 112 Gb/s coherent burst mode receiver using a parallel processing DSP architecture with a 256 sample wide bus that is suitable for implementation on a CMOS ASIC with a 236.75 MHz clock speed. A novel equalizer initialisation scheme based on maximising the CMA error slope has been implemented and shown to avoid the CMA singularity problem and ensure a convergence time of less than 150 ns. We have shown that the performance of a commercially available TL is commensurate with burst mode coherent reception when differential decoding in employed and that required parallel DSP implementation does not seriously impair the polarization and frequency tracking performance of a digital coherent burst mode receiver.