Abstract
A new proposed gate-bias voltage-generating technique with threshold-voltage
compensation for analog circuits in the low-temperature polycrystalline silicon
(LTPS) thin-film transistors (TFTs) is proposed. The new proposed gate-bias
voltage-generating circuit with threshold-voltage compensation has been successfully
verified in an 8-μm LTPS process. The experimental results have shown that the impact
of TFT threshold-voltage variation on the biasing circuit can be reduced from
30% to 5% under a biasing voltage of 3 V. The new proposed gate-bias voltage-generating
technique with threshold-voltage compensation enables the analog circuits
to be integrated and implemented by the LTPS process on glass substrate for
an active matrix LCD panel.
© 2007 IEEE
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