Abstract
An optoelectronic bitonic sorter based on a recirculating architecture is presented. The data are input in word parallel-bit parallel fashion and processed by two smart pixel arrays made up of bitwise compare-and-exchange modules. Along with the logic design, the control and synchronization of the bitwise compare-and-exchange modules are discussed. Finally, the capacity, hardware requirements, response time, and throughput of the recirculating bitonic sorter are compared with a pipeline implementation. The proposed recirculating architecture is shown to require less hardware than the pipelined systems. However, the decrease in hardware results in a decrease in system throughput.
© 1994 Optical Society of America
Full Article | PDF ArticleMore Like This
M. P. Y. Desmulliez, F. A. P. Tooley, J. A. B. Dines, N. L. Grant, D. J. Goodwill, D. Baillie, B. S. Wherrett, P. W. Foulk, S. Ashcroft, and P. Black
Appl. Opt. 34(23) 5077-5090 (1995)
Charles W. Stirk and Ravindra A. Athale
Appl. Opt. 27(9) 1721-1726 (1988)
M. P. Y. Desmulliez, B. S. Wherrett, A. J. Waddie, J. F. Snowdon, and J. A. B. Dines
Appl. Opt. 35(32) 6397-6416 (1996)