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Interferometric imaging using Si3N4 photonic integrated circuits for a SPIDER imager

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Abstract

This paper reports design, fabrication, and experimental demonstration of a silicon nitride photonic integrated circuit (PIC). The PIC is capable of conducting one-dimensional interferometric imaging with twelve baselines near λ = 1100-1600 nm. The PIC consists of twelve waveguide pairs, each leading to a multi-mode interferometer (MMI) that forms broadband interference fringes or each corresponding pair of the waveguides. Then an 18 channel arrayed waveguide grating (AWG) separates the combined signal into 18 signals of different wavelengths. A total of 103 sets of fringes are collected by the detector array at the output of the PIC. We keep the optical path difference (OPD) of each interferometer baseline to within 1 µm to maximize the visibility of the interference measurement. We also constructed a testbed to utilize the PIC for two-dimension complex visibility measurement with various targets. The experiment shows reconstructed images in good agreement with theoretical predictions.

© 2018 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

Interferometry has become an indispensable tool for modern astronomy. It uses superimposed electromagnetic waves to extract information about the wave source [1, 2]. Typically, the telescope diameter D limits the angular resolution of the telescope to Фλ/D because of diffraction. In comparison, optical interferometry brings the light of many telescopes together to create high angular resolution images. These images have the resolution equivalent to a telescope with a diameter equal to the size of the largest separation between the telescope pairs, although with much less sensitivity. An interferometer allows the angular resolution to be Фλ/B, in which B is the distance between telescopes. As a result, optical interferometer arrays are now the instrument of choice for high-resolution imaging. Examples of such interferometer arrays include the CHARA Array [3, 4], the Very Large Telescope Interferometer [5], and the Navy Precision Optical Interferometer [6]. These systems use far-field spatial coherence measurements to form an intensity image of an astronomical source [7]. They require complex beam combination systems with long adjustable delay lines to compensate for optical path differences (OPD) when viewing targets in different parts of the sky.

In our previous publications [8–11], we discussed the concept of a small-scale interferometric imager, which we named Segmented Planar Imaging Detector for Electro-optical Reconnaissance (SPIDER). The SPIDER imager is a Fourier-domain interferometric imaging telescope that utilizes photonic integrated circuits (PICs) to directly detect white-light interference fringes. We also demonstrated the SPIDER concept with a two-baseline silica photonic integrated circuit as a simple one-dimension imager [12]. SPIDER utilizes PICs in a rigid common mount to form the beam combination hardware, eliminating the need for long adjustable delay lines. Instead, the entire system is repointed to image different objects. It also uses a lenslet array to simultaneously create multiple interferometer baselines in two dimensions, eventually enabling snapshot imaging. The conceptual SPIDER imager is illustrated in Fig. 1(a). Light from a distant target is coupled through multiple pairs of lenslets into waveguides on a PIC chip and then combined to form the interference patterns. We can reconstruct the intensity distribution of the distant source by measuring the contrast and phase, also called the “visibility,” of the interference fringes rom these baselines [7].

 figure: Fig. 1

Fig. 1 (a) The schematic diagram of the conceptual SPIDER telescope. (b) Layer-by-layer breakdown of the SPIDER telescope.

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The conceptual SPIDER telescope uses multiple baselines to sample the target visibility function in the spatial frequency domain, and then digitally reconstructs the object image. The SPIDER telescope can be broken down into five layers, as shown in Fig. 1(b). The tube arrays layer minimizes stray light. The lenslet arrays in the second layer couple light from a distant target onto the waveguides in the PIC. The lenslets define the apertures that capture light. Each PIC is a one-dimensional interferometer, and the 37 PICs arranged in a radial pattern can thoroughly sample the target’s two-dimensional spatial frequencies. The back plate contains digital signal processing (DSP) electronics to process the readouts from detectors. Extra align cylinders (not shown in the figure) are needed for mechanical support and hold all the parts together.

We are developing the SPIDER imager as a potential alternative to conventional optical telescopes [10]. Conventional optical telescopes usually require large lenses or reflectors contained in a long tube, which must be maintained in a rigid structure with controlled ambient temperature. The bulky optics, rigid supporting structures, and the complex thermal controls makes conventional telescopes bulky, heavy and power consuming. For instance, the Hubble telescope [13] is 13.3 m long, weighs 27,000 pounds, and utilizes a 2.4 m diameter primary mirror. In a SPIDER imager, we substitute the large optics and structures with PICs made using standard CMOS fabrication techniques. We also replace the alignment and testing of the optics with in-process integration and device characterization during PIC fabrication. Using PIC components, an interferometric imaging telescope can achieve the same resolution with much reduced size, weight, and power (SWaP). As a result, the SPIDER imager is an attractive choice for space-based surveillance systems.

In this paper, we demonstrate a one-dimensional Si3N4 PIC for interferometric imaging. Then we use the PIC in a proof-of-concept two-dimensional interferometry experiment. Such PICs provide spectral filters, optical phase modulators, and light combiners on the same integrated platform. They have the potential to become the core components of an interferometric imager, and we believe this demonstration proves the possibility of realizing a complete SPIDER telescope.

2. The SPIDER concept

The SPIDER interferometer is based on the optical interferometry technique. For the simplified interferometry system as shown in Fig. 2(a), it contains two apertures to capture light from a distant source, a beam combiner to mix the obtained signals, two detectors to measure the combined signals, and two delay lines to change the relative phase of the signals. As we adjust the delay line length in one of the two arms, the combined beam intensity Itot measured at one output port has:

 figure: Fig. 2

Fig. 2 (a) A two-aperture interferometry system. (b) Working principle of the interferometer PIC.

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Itot=I1+I2+2I1I2|γ12|cos{2πλ[LB+Δx+arg(γ12)]}

Here I1 and I2 are the intensity throughputs from each of the two apertures. The γ12 term represents the complex degree of coherence between the light collected by each aperture. λ is the wavelength of the light source. L is the unit vector that points from the interferometer towards the object. B is the vector of interferometer baseline width. Δx is the optical path length difference through the interferometer for the light captured by the two apertures. The L•B term represents the free space optical path difference associated with the viewing geometry. By changing the Δx value, we can measure the Itot fringe information based on Eq. (1). Fringes measured at the opposite output port will be π out of phase with respect to Eq. (1).

We can calculate the visibility V from the measured fringe,

abs(V)=ImaxIminImax+Imin=2I1I2I1+I2|γ12|

The term 2I1I2/(I1+I2) is associated with unequal beam intensities received by the two apertures. It can be characterized through calibration measurements. Through the van Cittert-Zernike Theorem [2, 14], the γ12 term is related to the source intensity distribution through a Fourier transform. The phase of the fringes is related to γ12 through Eq. (1). By measuring the complex fringe visibility from many different baselines, we can calculate the 2D spatial Fourier transform of the source distribution. Then we perform an inverse Fourier transform on the complex visibility to obtain the source brightness distribution [15].

The Si3N4 PIC measures the Fourier domain information of the target’s intensity distribution. The schematic of the PIC is illustrated in Fig. 2(b). A focusing lenslet array is aligned to the PIC to couple light into the waveguides. The lenslet array is divided into multiple pairs, and each pair corresponds to a certain baseline. Bmax and Bmin are the maximum and minimum interferometer vector baselines of the PIC. The PIC first combines the paired beam in 2 × 2 couplers and then splits the combined light into multiple wavelengths using arrayed waveguide gratings (AWG). The balanced photodetector array measures the output intensity fringes while the phase shifters scan the phase delay on the arms. From the fringe information, we can calculate the phase and amplitude of the object visibility function. Then we can reconstruct the 1-D target intensity distribution in the spatial frequency Fourier plane (the uv-plane) [15].

3. Si3N4 multilayer platform

Recent advancements in PICs are attracting more and more interest in building scalable and low-cost on-chip optical systems [16]. Compared with silica PICs, silicon nitride (Si3N4) based PICs have the advantages of lower fabrication cost, smaller device footprint, and higher optical component density. We used the multilayer Si3N4 PIC structure to demonstrate a twelve baseline, eighteen frequency channel, one-dimensional interferometric imager.

We design, fabricate and demonstrate a Si3N4 multilayer platform optimized for low-loss and a compact form factor. The developed platform has three Si3N4 waveguide layers. The bottom (layer #1) and top (layer #3) layers have 150 nm think Si3N4 waveguides, while the middle (layer #2) layer has 50 nm thick Si3N4 waveguides. Between the layers are 0.8 µm thick SiO2 waveguide cladding layers. Figure 3 illustrates the cross-section of the three-layer waveguide structure.

 figure: Fig. 3

Fig. 3 (a) Cross section of fabricated three-layer Si3N4 waveguide design. (b)(c) Waveguide mode cross sections for the 2 µm and 6 µm wide Si3N4 waveguide.

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There are several aspects to consider in determining the multilayer Si3N4/SiO2 platform, such as device footprint, fabrication difficulty, and functional compatibility. As the waveguide core thickness becomes thinner, the mode is less confined in the waveguide core, and the minimum bending radius required for less than 0.1 dB per 90° bend becomes larger. A larger bending radius will result in larger device footprint. However, a thick silicon nitride waveguide core increases the possibility of stress-induced cracks. A 150 nm Si3N4 waveguide thickness provides a good balance between these factors. All the waveguide bends, AWGs and MMIs (multi-mode interference) are placed on the 150 nm layers. The bending radius is 150 µm. The 50 nm layer is used for layer-to-layer transition and edge couplers. Without the 50 nm layer, the gap between the two 150 nm layers needs to be much smaller for light to be able to couple between the two layers, which would lead to increased crosstalk for a two-layer device.

We simulate the waveguide mode structure for both the 150 nm and 50 nm Si3N4 waveguide layers. For the 150 nm layer, the single mode waveguide width is 2 µm, and the bending radius is 150 µm. For the 50 nm Si3N4 layer, the single mode waveguide width is 6 µm, and the bending radius is 2500 µm. Figures 3(b) and 3(c) show the waveguide mode amplitude profile.

The main reason to utilize the multilayer PIC platform is that the optical devices occupy a smaller footprint compared to a single layer PIC platform. This is because the various components can be placed on different layers instead of having them all on a single layer. Achieving low interlayer vertical coupling loss and waveguide crossing loss is essential for realizing practical Si3N4 multilayer PICs. Figure 4 shows the layer to layer coupling structure. In the 100 µm long coupling region, the waveguide tapers from single mode width to 0.25 µm wide. For left-to-right propagation, light from in the bottom layer waveguide couples first into the middle layer and then the top layer.

 figure: Fig. 4

Fig. 4 Schematic of the tapered vertical coupler in the three-layer Si3N4 platform. (a) Top-down view. (b) Cross-section view.

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4. Device fabrication

We fabricated the three-layer SPIDER PIC using ASMLTM PAS 5500 300 deep-UV lithography stepper technology. Figure 5 shows the main fabrication steps. Starting with a blank 6-inch wafer, we grew 8 µm thick Low-Temperature Oxide (LTO) using Low-Pressure Chemical Vapor Deposition (LPCVD), which serves as the lower waveguide cladding layer. Then, we deposit stoichiometric Si3N4 using LPCVD at 800 °C to form the first 150 nm waveguide layer. Inductively Coupled Plasma (ICP) Etching then defines the waveguide layer pattern. Afterward, we deposited 0.8 µm LTO to from the over-cladding layer and planarized it with chemical mechanical polishing (CMP). This waveguide-cladding process is repeated two more times to form the middle and top waveguide layers. Finally, we deposited 20 nm titanium and 200 nm platinum as the heater metal using electron-beam evaporation, followed with 1 µm gold electrodes. The heater structures are intended to be used to adjust the optical path difference between the arms of each interferometer baseline.

 figure: Fig. 5

Fig. 5 Fabrication flow charts of SPIDER ZOOM device. (a) Starting 6 inch silicon wafer after initial cleaning; (b) LTO deposition; (c) 150 nm thick Si3N4 bottom layer deposition; (d) Si3N4 bottom layer lithography and etching; (e) First inter-layer LTO cladding deposition; (f) CMP; (g) 50 nm thick Si3N4 middle layer deposition. (h) Si3N4 middle layer lithography and etching; (i) Second inter-layer LTO cladding deposition; (j) CMP; (k) 150 nm Si3N4 top layer deposition; (l) Si3N4 top layer lithography and etching; (m) LTO cladding deposition; (n) CMP; (o) Ti/Pt heater lift-off. (p) Au electrode layer lift-off.

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5. PIC design and layout

The Si3N4 SPIDER ZOOM PIC has a total of 12 baselines. Figure 6(a) shows the baseline arrangement based on a 30-element linear lenslet array with lenslet diameter equal to 0.72 mm. The minimum baseline is 0.72 mm, and the maximum baseline is 20.88 mm. More information on the baseline design can be found in one of our previous publications [17]. The input signal from each baseline is coupled to an 18 channel Si3N4 AWG, shown in Fig. 6(b). The AWG has 36 outputs and two inputs, working as two 1 × 18 wavelength channels demultiplexer in opposite directions. All 12 baselines use the same design of AWG and MMI. The two optical signals from the same baseline share the same AWG, one using the left input and the other one using the right input. Since they share the same array arms, the wavelength difference between beams is reduced to a minimum.

 figure: Fig. 6

Fig. 6 (a) Configuration of the twelve baselines in Si3N4 SPIDER ZOOM. (b) 18 channel 27.6nm channel spacing Si3N4 AWG layout.

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For the spectral demultiplexer, we used an 18 channel 27.6 nm channel spacing AWG specially designed for the SPIDER ZOOM device. It has two noticeable differences from a traditional AWG. First, due to the large channel-to-channel spacing, the arrayed waveguides have a small neighboring waveguide length difference ΔL of 1.79 µm. To achieve that, the AWG use three curve sections to adjust the ΔL value. Secondly, since two components from the same baseline share the same AWG, to avoid waveguide crossing and minimum routing, the AWG input is placed at the side port instead of the typical center port.

The maximum exposure area of the ASML deep-UV stepper is 22 × 22 mm. The limitation in footprint size is very tight for the SPIDER device, which needs twelve AWGs, twelve MMIs, twenty-four heaters, and a lot of waveguide routings. However, the three-layer Si3N4 platform makes the design possible. We start with placing twelve AWGs in a 4 × 3 matrix, then assign each AWG to either of the 150 nm waveguide layers, so the AWGs from the same layer have enough spacing. Then we route each baseline channel to the designated AWG. Afterwards, we modify the layers for different baselines and AWGs, so the overall loss from crossing and layer change is kept to a minimum. Finally, we place metal heaters on top of 1500 µm long top layer waveguide and then connect the heaters to metal pads on the edge of the chip for future wire bonding. This design process reduces the waveguide crossing to one crossing per channel and provides enough area to place the AWGs. Figure 7(a) shows the completed device layout.

 figure: Fig. 7

Fig. 7 (a) The Si3N4 multilayer SPIDER PIC layout. (b) A Si3N4 SPIDER main device.

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6. PIC Characterization

Figure 8(b) shows the fabricated Si3N4 SPIDER device. We characterized it using several test structures incorporated on the same wafer as the main SPIDER device. Figures 9(a) shows single-layer waveguide structures for characterizing the waveguide bending losses. We evaluated the waveguide loss for a 2.5 µm wide straight waveguide using a spiral test structure, shown in Fig. 8(b). After four separate measurements, we can extrapolate the waveguide propagation loss to be 0.63 dB/cm, as shown in Fig. 8(c). The waveguide loss is on the high side compared to thinner Si3N4 waveguides, but low enough to observe the functionality of the SPIDER device. Using the five bending structures in Fig. 8(a), we can extrapolate the bending waveguide loss to be 0.33 dB/π for a bending radius of 150 µm. Both bending loss and propagation loss are higher than our expectation, and we hope to improve with optimized fabrication process in our next fabrication run.

 figure: Fig. 8

Fig. 8 (a) The bending-waveguide-loss test structure. (b) The straight-waveguide-loss test structure. (c) A linear fit to calculate the straight waveguide propagation loss. (d) A linear fit to calculate the bending loss.

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 figure: Fig. 9

Fig. 9 (a) The spectrum of the 18 channel AWG (b) Design values of the center passband wavelength of each AWG channel.

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Using an optical vector network analyzer (OVNA), we characterized the spectral response of a test AWG on the same wafer. The OVNA is capable of high spectral resolution measurement and uses a continuously swept mode-hop-free laser to measure the transmission spectrum of the AWG. Figure 9(a) shows the measured spectrum across the 18 AWG channels. The AWG transmission loss for the 18 channels is 5 ~6 dB. The measured channel spacing is 28.5 nm with a channel crosstalk of approximately −18 dB. We believe that phase errors in the arrayed waveguides region give rise to the relatively high channel cross-talk since recently demonstrated Si3N4 AWGs have shown crosstalk as low as 24 dB [18]. The phase error is caused by the non-uniformity in the effective refractive index due to fabrication imperfections. The AWG crosstalk performance can be further improved by optimizing the fabrication process through Si3N4 sidewall smoothing.

One of the significant factors that limit the SPIDER PIC performance is the on-chip optical loss. For a given target image, high PIC optical loss requires more sensitive detectors, which may not be available in an actual application. The 18 channel AWG demultiplexer has 5 ~6 dB transmission loss on all channels. The longest baseline has a straight waveguide length of approximately 5 cm, and the shortest baseline has a straight waveguide length of about 3 cm. Thus the average straight waveguide loss for a baseline is 2.5 dB. Similarly, each baseline waveguide goes through 6π bends, leading to a 2 dB bending waveguide propagation loss. The 2 × 2 MMI has 3 dB intrinsic loss, and 0.5 dB extra loss from fabrication inaccuracy. Finally, the layer-to-layer transition structure is measured to have 0.5 dB optical loss. Each baseline takes another 1.5 dB optical loss after going through three transitions.

The above analysis shows that the three-layer Si3N4 SPIDER PIC has a total on-chip optical loss of 15 dB. The straight and bending waveguide optical loss is mainly caused by two factors: 1) material absorption loss from H bonds in the Si3N4 material and 2) scattering loss from the etched waveguide sidewall. The absorption loss can be reduced by high-temperature (>1150 °C) annealing in N2 at ambient atmospheric pressure. The scattering loss can be reduced by photoresist reflow and combined dry and wet etching to form a smooth waveguide sidewall. We continue work on both fabrication and design to improve on-chip optical loss.

7. Testbed Experimental Arrangement

Finally, we revised the previous optical testbed [12] to generate and reconstruct a 2D extended scene. Figure 10 shows the schematic of the optical testbed. It uses a rotation mount to rotate the target 2D scene. So, with a 1D SPIDER PIC, we can capture the scene at many different angles, and then reconstruct the 2D image. The testbed is composed of a light source, the scene mounted on a rotation stage, an optical projection system, a long-pass optical filter to eliminate excess stray light at visible wavelengths and a fast-steering mirror. The steering mirror simulates the delay line length change in Fig. 2(a) so we can generate fringes at the outputs. The light source and the optical projector make up the scene generator. The projector uses two off-axis paraboloids and three flat mirrors (M1, M2, and M3).

 figure: Fig. 10

Fig. 10 Schematic of the 2D image optical testbed.

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We used two scenes for imaging tests: (a) a bar target from the U.S. Air Force (USAF) resolution test chart, and (b) a scene of trains on a train track. Both scenes are shown in Fig. 10.

The bar target features are visible in Fig. 11(c) but they are blurred considerably compared to the simulated image in Fig. 11(b). The blur is mainly caused by the wobble in the rotation stage used to collect data for different scene orientation angles. The wobble causes phase errors, and blurs the reconstructed image, therefore negatively affecting the resolution and the image quality. To correct for this, we compared the experimental baseline estimates with simulated values for each orientation angle, then solved for the target shift that minimized the phase difference between the experimental and simulated data. Figure 11(d) shows an experimental image of the bar target after phase error correction. The Fig. 11(d) image reconstructed from the measurement is very similar to the simulated image in Fig. 11(b).

 figure: Fig. 11

Fig. 11 USAF bar chart test target used for SPIDER imaging demo: (a) test target; (b) numerically simulated SPIDER image; (c) initial inverse FFT experimental image reconstruction; (d) Image reconstruction after correcting for stage wobble during data collection.

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Figure 12 shows similar results for the second test object which is an overhead view of a train yard. Figure 12(a) shows a high-resolution image of the actual scene viewed through a microscope. Figure 12(b) shows the simulated SPIDER image, using the same baselines as the SPIDER PIC. Figures 12(c) and 12(d) show experimental reconstructed images before and after correcting for rotation stage wobble. Figure 12(e) shows an iterative image reconstruction result from experimental data that incorporates penalty metrics for both nonnegative and finite scene support as well as a total-variation metric for regularization. These metrics help mitigate the impacts for sparse Fourier sampling by incorporating information about the scene. The result is an image reconstruction that looks more like the actual object.

 figure: Fig. 12

Fig. 12 SPIDER imaging using the train scene target: (a) image of the scene collected with a microscope; (b) simulated SPIDER image; (c) initial inverse FFT image reconstruction from experimental data; (d) image after correcting for stage wobble; and (e) iterative image reconstruction result.

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8. Summary

We discussed the concept of a SPIDER imager that has the potential to reduce SWaP compared to conventional telescopes. We demonstrated a twelve-baseline Si3N4 PIC that is a core part of the SPIDER imager. The PIC measures a far field scene’s Fourier domain information. The imaging testbed results show interferometric imaging for two different scenes. The image reconstruction experiment validates the basic principle of the SPIDER. In order to improve the reconstructed image quality, we will integrate a new system that includes many PICs placed at various angles so that simultaneous measurements of various angular component of the Fourier plane can be achieved without any mechanical rotation. Future PIC designs will also include longer baselines for higher imaging resolution, and more baselines for dense Fourier sampling in the u-v plane. We plan to incorporate on-chip detectors and to improve the lens design to achieve higher optical coupling and higher signal-to-noise ratios. Further, realizing a polarization independent or a polarization diversified SPIDER system will potentially double the signal-to-noise ratios. Lastly, real-time image processing will be incorporated for practical applications.

Funding

Defense Advanced Research Projects Agency (DARPA) TTO (W31P4Q-13-1-006);

National Aeronautics and Space Administration (NASA) NNX16AP60G;

Lockheed Martin Advanced Technology Center internal research and development (IRAD) funding.

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Figures (12)

Fig. 1
Fig. 1 (a) The schematic diagram of the conceptual SPIDER telescope. (b) Layer-by-layer breakdown of the SPIDER telescope.
Fig. 2
Fig. 2 (a) A two-aperture interferometry system. (b) Working principle of the interferometer PIC.
Fig. 3
Fig. 3 (a) Cross section of fabricated three-layer Si3N4 waveguide design. (b)(c) Waveguide mode cross sections for the 2 µm and 6 µm wide Si3N4 waveguide.
Fig. 4
Fig. 4 Schematic of the tapered vertical coupler in the three-layer Si3N4 platform. (a) Top-down view. (b) Cross-section view.
Fig. 5
Fig. 5 Fabrication flow charts of SPIDER ZOOM device. (a) Starting 6 inch silicon wafer after initial cleaning; (b) LTO deposition; (c) 150 nm thick Si3N4 bottom layer deposition; (d) Si3N4 bottom layer lithography and etching; (e) First inter-layer LTO cladding deposition; (f) CMP; (g) 50 nm thick Si3N4 middle layer deposition. (h) Si3N4 middle layer lithography and etching; (i) Second inter-layer LTO cladding deposition; (j) CMP; (k) 150 nm Si3N4 top layer deposition; (l) Si3N4 top layer lithography and etching; (m) LTO cladding deposition; (n) CMP; (o) Ti/Pt heater lift-off. (p) Au electrode layer lift-off.
Fig. 6
Fig. 6 (a) Configuration of the twelve baselines in Si3N4 SPIDER ZOOM. (b) 18 channel 27.6nm channel spacing Si3N4 AWG layout.
Fig. 7
Fig. 7 (a) The Si3N4 multilayer SPIDER PIC layout. (b) A Si3N4 SPIDER main device.
Fig. 8
Fig. 8 (a) The bending-waveguide-loss test structure. (b) The straight-waveguide-loss test structure. (c) A linear fit to calculate the straight waveguide propagation loss. (d) A linear fit to calculate the bending loss.
Fig. 9
Fig. 9 (a) The spectrum of the 18 channel AWG (b) Design values of the center passband wavelength of each AWG channel.
Fig. 10
Fig. 10 Schematic of the 2D image optical testbed.
Fig. 11
Fig. 11 USAF bar chart test target used for SPIDER imaging demo: (a) test target; (b) numerically simulated SPIDER image; (c) initial inverse FFT experimental image reconstruction; (d) Image reconstruction after correcting for stage wobble during data collection.
Fig. 12
Fig. 12 SPIDER imaging using the train scene target: (a) image of the scene collected with a microscope; (b) simulated SPIDER image; (c) initial inverse FFT image reconstruction from experimental data; (d) image after correcting for stage wobble; and (e) iterative image reconstruction result.

Equations (2)

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I tot = I 1 + I 2 +2 I 1 I 2 | γ 12 |cos{ 2π λ [ L B +Δx+arg( γ 12 ) ] }
abs( V )= I max I min I max + I min = 2 I 1 I 2 I 1 + I 2 | γ 12 |
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